LFEC LATTICE [Lattice Semiconductor], LFEC Datasheet - Page 20

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LFEC

Manufacturer Part Number
LFEC
Description
LatticeECP/EC Family Data Sheet
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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Lattice Semiconductor
MULTADD sysDSP Element
In this case, the operands A0 and B0 are multiplied and the result is added/subtracted with the result of the multi-
plier operation of operands A1 and A2. The user can enable the input, output and pipeline registers. Figure 2-20
shows the MULTADD sysDSP element.
Figure 2-20. MULTADD
MULTADDSUM sysDSP Element
In this case, the operands A0 and B0 are multiplied and the result is added/subtracted with the result of the multi-
plier operation of operands A1 and B1. Additionally the operands A2 and B2 are multiplied and the result is added/
subtracted with the result of the multiplier operation of operands A3 and B3. The result of both addition/subtraction
are added in a summation block. The user can enable the input, output and pipeline registers. Figure 2-21 shows
the MULTADDSUM sysDSP element.
Multiplicand A0
Multiplicand A1
Multiplier B0
Multiplier B1
Signed
Addn
Shift Register B Out
Shift Register B In
n
n
Register B
Register B
Input Data
Input Data
n
n
n
n
n
Register
Register
Input
Input
m
m
Register A
Register A
Input Data
Input Data
Shift Register A Out
m
m
m
Shift Register A In
m
m
Register
Pipeline
Register
Pipeline
Pipe
Pipe
Reg
Reg
m
n
m
n
2-17
To Add/Sub
To Add/Sub
Multiplier
Multiplier
Register
Pipeline
Register
Pipeline
x
x
(default)
(default)
m+n
m+n
LatticeECP/EC Family Data Sheet
Add/Sub
CLK (CLK0,CLK1,CLK2,CLK3)
CE (CE0,CE1,CE2,CE3)
RST(RST0,RST1,RST2,RST3)
(default)
m+n+1
(default)
m+n+1
Architecture
Output

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