A54SX08-1BG208 ETC1 [List of Unclassifed Manufacturers], A54SX08-1BG208 Datasheet - Page 18

• Manufacturer Part Number: A54SX08-1BG208
• Description: 54SX Family FPGAs
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

E v a l u a ti n g P o w er i n 5 4 S X D e v i c es
A critical element of system reliability is the ability of
electronic devices to safely dissipate the heat generated
during operation. The thermal characteristics of a circuit
depend on the device and package used, the operating
temperature, the operating current, and the system's ability
to dissipate heat.
You should complete a power evaluation early in the design
process to help identify potential heat-related problems in
the system and to prevent the system from exceeding the
device’s maximum allowed junction temperature.
The actual power dissipated by most applications is
significantly lower than the power the package can
dissipate. However, a thermal analysis should be performed
for all projects. To perform a power evaluation, follow these
steps:
• Estimate the power consumption of the application.
• Calculate the maximum power allowed for the device and
• Compare the estimated power and maximum power
E s t i m a t i ng P o w e r C o ns u m p ti o n
The total power dissipation for the 54SX family is the sum of
the DC power dissipation and the AC power dissipation. Use
Equation 1 to calculate the estimated power consumption of
your application.
P
D C P o w e r D i s s i p a t i o n
The power due to standby current is typically a small
component of the overall power. The Standby power is
shown below for commercial, worst case conditions (70°C).
Table 3 •
The DC power dissipation is defined in Equation 2 as
follows:
P
(I
A C P o w e r D i s s i p a t i o n
The power dissipation of the 54SX Family is usually
dominated by the dynamic power dissipation. Dynamic
power dissipation is a function of frequency, equivalent
capacitance and power supply voltage. The AC power
18
I
4mA
Total
CC
DC
standby
package.
values.
= (I
= P
)*V
standby
DC
CCI
+ P
)*V
+ x*V
AC
CCA
V
3.6V
OL
CC
+ (I
*I
OL
standby
+ y*(V
)*V
CCI
CCR
– V
+
Power
14.4mW
OH
)*V
OH
(1)
(2)
v3.1
dissipation is defined as follows:
P
P
P
(n * C
(0.5 * (q
(0.5 * (q
(0.5 * (s
D e f i n i t i o n o f T e r m s U s e d i n F o r m u la
m
n
p
q
q
x
y
r
r
s
C
C
C
C
C
C
C
f
f
f
f
f
f
C
C
C
C
C
C
r
r
m
n
p
q1
q2
s1
1
2
1
1
2
1
2
AC
Output Buffer
AC
EQM
EQI
EQO
EQCR
EQHV
EQHF
L
EQM
EQI
EQO
EQCR
EQHV
EQHF
(pF)
(pF)
= P
= V
(pF) 3.4
(pF) 4.7
EQI
(pF) 4.0
(pF) 1.6
CCA
Module
1
1
2
= Number of logic modules switching at f
= Number of input buffers switching at f
= Number of output buffers switching at f
= Number of clock loads on the first routed array
= Number of clock loads on the second routed
= Number of I/Os at logic low
= Number of I/Os at logic high
= Fixed capacitance due to first routed array
= Fixed capacitance due to second routed array
= Number of clock loads on the dedicated array
= Equivalent capacitance of logic modules in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of routed array clock in
= Variable capacitance of dedicated array clock
= Fixed capacitance of dedicated array clock
= Output lead capacitance in pF
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
= Average output buffer switching rate in MHz
= Average first routed array clock rate in MHz
= Average second routed array clock rate in MHz
= Average dedicated array clock rate in MHz
* f
* C
* C
* C
2
n
clock
array clock
clock
clock
clock
pF
A54SX08 A54SX16 A54SX16P A54SX32
0.615
60
87
87
)
EQHV
* [(m * C
+ P
EQCR
EQCR
Input Buffer
+ P
Input Buffer
RCLKA Net
* f
* f
* f
s1
q1
q2
EQM
) + (C
) + (r
)+ (r
+ (p * (C
4.0
3.4
4.7
1.6
0.615
96
138
138
* f
+ P
2
1
EQHF
m
* f
* f
)
RCLKB Net
Module
q2
q1
EQO
))
* f
))
5 4 S X F a m i l y F P G A s
RCLKB
s1
4.0
3.4
4.7
1.6
0.615
96
138
138
RCLKA
+ C
))
+
HCLK
L
+ P
) * f
+
+
HCLK Net
]
p
)
Output Buffer
4.0
3.4
4.7
1.6
0.615
140
171
171
n
m
p
+
(3)
(4)
+