HD6432621 Hitachi, HD6432621 Datasheet - Page 143

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
5.2.2
The IPR registers are twelve 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between IPR settings and interrupt sources is shown in table 5-3.
The IPR registers set a priority (level 7 to 0) for each interrupt source other than NMI.
The IPR registers are initialized to H'77 by a reset and in hardware standby mode.
They are not initialized in software standby mode.
Bits 7 and 3—Reserved: These bits are always read as 0 and cannot be modified.
Table 5-3
Register
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRI
IPRJ
IPRK
IPRM
Notes: *1 Reserved bits. These bits are always read as 1 and cannot be modified.
Bit
Initial value
R/W
*2 Valid only in the H8S/2626 Series.
Interrupt Priority Registers A to K, M (IPRA to IPRK, IPRM)
Correspondence between Interrupt Sources and IPR Settings
:
:
:
7
0
IPR6
R/W
6 to 4
IRQ0
IRQ2
IRQ3
—*
WDT0
PC break
TPU channel 0
TPU channel 2
TPU channel 4
—*
—*
SCI channel 1
HCAN
6
1
1
1
1
IPR5
R/W
5
1
IPR4
R/W
4
1
3
0
Bits
2 to 0
IRQ1
IRQ4
IRQ5
DTC
—*
A/D converter, WDT1*
TPU channel 1
TPU channel 3
TPU channel 5
—*
SCI channel 0
SCI channel 2
—*
1
1
1
IPR2
R/W
2
1
IPR1
R/W
1
1
2
IPR0
R/W
0
1
99

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