HD6432621 Hitachi, HD6432621 Datasheet - Page 693
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
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19.8.3
In error protection, an error is detected when H8S/2626 or H8S/2623 runaway occurs during flash
memory programming/erasing, or operation is not performed in accordance with the
program/erase algorithm, and the program/erase operation is aborted. Aborting the program/erase
operation prevents damage to the flash memory due to overprogramming or overerasing.
If the H8S/2626 or H8S/2623 malfunctions during flash memory programming/erasing, the FLER
bit is set to 1 in FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2,
EBR1, and EBR2 settings are retained, but program mode or erase mode is aborted at the point at
which the error occurred. Program mode or erase mode cannot be re-entered by re-setting the P1
or E1 bit. However, PV1 and EV1 bit setting is enabled, and a transition can be made to verify
mode.
FLER bit setting conditions are as follows:
1. When the flash memory of the relevant address area is read during programming/erasing
2. When a SLEEP instruction (including software standby) is executed during
Error protection is released only by a reset and in hardware standby mode.
(including vector read and instruction fetch)
programming/erasing
Error Protection
649
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