HD6432621 Hitachi, HD6432621 Datasheet - Page 747
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
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21B.1 Overview
In addition to the normal program execution state, the H8S/2626 Series has nine power-down
modes in which operation of the CPU and oscillator is halted and power dissipation is reduced.
Low-power operation can be achieved by individually controlling the CPU, on-chip supporting
modules, and so on.
The H8S/2626 operating modes are as follows:
(1) High-speed mode
(2) Medium-speed mode
(3) Subactive mode*
(4) Sleep mode
(5) Subsleep mode*
(6) Watch mode*
(7) Module stop mode
(8) Software standby mode
(9) Hardware standby mode
(2) to (9) are power-down modes. Sleep mode and sub-sleep mode are CPU states, medium-speed
mode is a CPU and bus master state, sub-active mode is a CPU and bus master and internal
peripheral function state, and module stop mode is an internal peripheral function (including bus
masters other than the CPU) state. Some of these states can be combined.
After a reset, the LSI is in high-speed mode with modules other than the DTC in module stop
mode.
Note: * Subclock functions are available in the H8S/2626 Series.
Table 21B-1 shows the internal state of the LSI in the respective modes. Table 21B-2 shows the
conditions for shifting between the low power dissipation modes.
Figure 21B-1 is a mode transition diagram.
See section 20.7, Subclock Oscillator, for the method of fixing pins OSC1 and OSC2
when not used.
Section 21B Power-Down Modes
[H8S/2626 Series]
703
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