HD6432646 Hitachi, HD6432646 Datasheet - Page 591

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

LAFMH Bits 12 to 10—Reserved: These bits always read 0. The write value should always be 0.
LAFMH Bits 9 and 8, LAFML bits 15 to 0–18-Bit Identifier Filter (LAFMHx, LAFMLx):
Filter mask bits for the 18 bits of the receive message identifier (extended).
Bit x: LAFMHx
0
1
15.2.18 Message Control (MC0 to MC15)
The message control register sets (MC0 to MC15) consist of eight 8-bit readable/writable registers
(MCx[1] to MCx[8]). The HCAN has 16 sets of these registers (MC0 to MC15).
The initial value of these registers is undefined, so they must be initialized (by writing 0 or 1).
LAFMLx
Initial value:
Initial value:
Initial value:
MCx [1]
MCx [2]
MCx [3]
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Description
Stored in RX0 (receive-only mailbox) depending on bit match between RX0
message identifier and receive message identifier
Stored in RX0 (receive-only mailbox) regardless of bit match between RX0
message identifier and receive message identifier
R/W
R/W
—
—
—
—
7
*
7
*
7
*
R/W
R/W
—
—
—
—
6
*
6
*
6
*
R/W
R/W
—
—
—
—
5
*
5
*
5
*
R/W
R/W
—
—
—
—
4
*
4
*
4
*
DLC3
R/W
R/W
—
—
—
3
*
3
*
3
*
DLC2
R/W
R/W
—
—
—
2
*
2
*
2
*
DLC1
R/W
R/W
—
—
—
1
*
1
*
1
*
(Initial value)
*:Undefined
(x = 15 to 0)
DLC0
R/W
R/W
—
—
—
0
*
0
*
0
*
557