HD6432646 Hitachi, HD6432646 Datasheet - Page 751

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Bit 3
STCS
0
1
Bits 2 to 0—System Clock Select 2 to 0 (SCK2 to SCK0): These bits select the bus master
clock.
Bit 2
SCK2
0
1
21.2.2
LPWRCR is an 8-bit readable/writable register that performs power-down mode control. The
following pertains to bits 1 and 0. For details of the other bits, see section 22.2.3, Low-Power
Control Register (LPWRCR). LPWRCR is initialized to H'00 by a reset and in hardware standby
mode. It is not initialized in software standby mode.
Bit
Initial value
Read/Write
Bit 1
SCK1
0
1
0
1
Low-Power Control Register (LPWRCR)
Description
Specified multiplication factor is valid after recovery from software standby mode,
watch mode, or subactive mode
Specified multiplication factor is valid immediately after STC bits are rewritten
DTON
R/W
Bit 0
SCK0
0
1
0
1
0
1
—
7
0
LSON
R/W
Description
Bus master is in high-speed mode
Medium-speed clock is ø/2
Medium-speed clock is ø/4
Medium-speed clock is ø/8
Medium-speed clock is ø/16
Medium-speed clock is ø/32
—
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
RFCUT
R/W
3
0
R/W
—
2
0
STC1
R/W
1
0
(Initial value)
(Initial value)
STC0
R/W
0
0
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