DG526CY Intersil Corporation, DG526CY Datasheet

DG526CY

Manufacturer Part Number

DG526CY

Description

SOP28

Manufacturer

Intersil Corporation

Datasheet

1.DG526CY.pdf (16 pages)

Specifications of DG526CY

Date_code

01+

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

DG526CY

Manufacturer:

VISHAY/威世

Quantity:

20 000

Current page: 1 of 16
Download datasheet (325Kb)

April 1999

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Features

• Direct RESET

• TTL and CMOS Compatible Address and Enable

• Maximum Power Supply Rating . . . . . . . . . . . . . . . . 44V

• Break-Before-Make Switching

• Alternate Source

Applications

• Data Acquisition Systems

• Communication Systems

• Automatic Test Equipment

• Microprocessor Controlled Systemd

Part Number Information

DG526AK

DG526AK/883B

DG526BK

DG526BY

DG526CJ

DG526CK

DG526CY

DG527AK

DG527AK/883B

DG527BK

DG527BY

DG527CJ

DG527CK

DG527CY

Inputs

NUMBER

PART

Harris Corporation 1999

Semiconductor

RANGE (

-55 to 125

-25 to 85

TEMP.

0 to 70

28 Ld CERDIP

28 Ld SOIC

28 Ld PDIP

28 Ld CERDIP

28 Ld SOIC

28 Ld CERDIP

28 Ld SOIC

28 Ld PDIP

28 Ld CERDIP

28 Ld SOIC

PACKAGE

F28.6

M28.3

E28.6

F28.6

M28.3

F28.6

M28.3

E28.6

F28.6

M28.3

PKG. NO.

12-1

Description

The DG526, DG527, DG528, and DG529 are CMOS

Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers.

Each device has on-chip address and control latches to sim-

plify design in microprocessor based applications. The DG526

uses 4 address lines to control its 16 channels; the DG527,

DG528 both use 3 address lines to control their 8 channels;

and the DG529 uses 2 address lines to control its 4 channels.

The enable pin is used to enable the address latches during

the WR pulse. It can be hard wired to the logic supply if one of

the channels will always be used (except during a reset) or it

can be tied to address decoding circuitry for memory mapped

operation. The RS pin is used to clear all latches regardless of

the state of any other latch or control line. The WR pin is used

to transfer the state of the address control lines to their

latches, except during a reset or when EN is low.

A channel in the ON state conducts signals equally well in

both directions. In the OFF state each channel blocks volt-

ages up to the supply rails. The address inputs, WR, RS and

the enable input are TTL and CMOS compatible over the full

speciﬁed operation temperature range.

DG528AK

DG528AK/883B

DG528BK

DG528BY

DG528CJ

DG528CK

DG528CY

DG529AK

DG529AK/883B

DG529BK

DG529BY

DG529CJ

DG529CK

DG529CY

NUMBER

PART

DG526, DG527,

DG528, DG529

RANGE (

-55 to 125

-25 to 85

TEMP.

0 to 70

Latchable Multiplexers

18 Ld CERDIP

18 Ld SOIC

18 Ld PDIP

18 Ld CERDIP

18 Ld SOIC

18 Ld CERDIP

18 Ld SOIC

18 Ld PDIP

18 Ld CERDIP

18 Ld SOIC

PACKAGE

File Number

Analog CMOS

F18.3

M18.3

E18.3

F18.3

M18.3

F18.3

M18.3

E18.3

F18.3

M18.3

PKG. NO.

3139.2

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