ISLA214P50IR72EV1Z Intersil Corporation, ISLA214P50IR72EV1Z Datasheet

ISLA214P50IR72EV1Z

Manufacturer Part Number

ISLA214P50IR72EV1Z

Description

EVALBOARD for ISLA214P50

Manufacturer

Intersil Corporation

Datasheets

1.ISLA214P50.pdf (37 pages)

2.ISLA214P50IRZ.pdf (37 pages)

Specifications of ISLA214P50IR72EV1Z

Pack_quantity

Comm_code

85437090

Lead_time

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14-Bit, 500MSPS ADC

ISLA214P50

The ISLA214P50 is a 14-bit, 500MSPS analog-to-digital converter

designed with Intersil’s proprietary FemtoCharge™ technology on

a standard CMOS process. The ISLA214P50 is part of a

pin-compatible portfolio of 12 to 16-bit A/Ds with maximum

sample rates ranging from 130MSPS to 500MSPS.

The device utilizes two time-interleaved 250MSPS unit ADCs to

achieve the ultimate sample rate of 500MSPS. A single 500MHz

conversion clock is presented to the converter, and all interleave

clocking is managed internally. The proprietary Intersil Interleave

Engine (I2E) performs automatic correction of offset, gain, and

sample time mismatches between the unit ADCs to optimize

performance.

A serial peripheral interface (SPI) port allows for extensive

configurability of the A/D. The SPI also controls the interleave

correction circuitry, allowing the system to issue offline and

continuous calibration commands as well as configure many

dynamic parameters.

Digital output data is presented in selectable LVDS or CMOS

formats. The ISLA214P50 is available in a 72 Ld QFN package

with an exposed paddle. Operating from a 1.8V supply,

performance is specified over the full industrial temperature

range (-40°C to +85°C).

Key Specifications

• SNR @ 500MSPS

• SFDR @ 500MSPS

• Total Power Consumption = 835mW @ 500MSPS

March 15, 2011

FN7571.1

= 72.7dBFS f

= 70.6dBFS f

= 84dBc f

= 76dBc f

CLKN

VINN

CLKP

VINP

VCM

= 363MHz

= 30MHz

SHA

= 30MHz

= 363MHz

Adjustments

Gain, Offset

VREF

and Skew

MANAGEMENT

250 MSPS

14-BIT

CLOCK

ADC

VREF

ADC

–

CONTROL

I2E

SPI

CORRECTION

DIGITAL

ERROR

CLKOUTP

CLKOUTN

D[13:0]P

D[13:0]N

ORP

ORN

Intersil (and design) and FemtoCharge are trademarks owned by Intersil Corporation or one of its subsidiaries.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

Features

• Automatic Fine Interleave Correction Calibration

• Single Supply 1.8V Operation

• Clock Duty Cycle Stabilizer

• 75fs Clock Jitter

• 700MHz Bandwidth

• Programmable Built-in Test Patterns

• Multi-ADC Support

• Nap and Sleep Modes

• Data Output Clock

• DDR LVDS-Compatible or LVCMOS Outputs

• User-accessible Digital Temperature Monitor

Applications

• Radar Array Processing

• Software Defined Radios

• Broadband Communications

• High-Performance Data Acquisition

• Communications Test Equipment

Pin-Compatible Family

- SPI Programmable Fine Gain and Offset Control

- Support for Multiple ADC Synchronization

- Optimized Output Timing

- 200

All other trademarks mentioned are the property of their respective owners.

ISLA216P25

ISLA216P20

ISLA216P13

ISLA214P50

ISLA214P25

ISLA214P20

ISLA214P13

ISLA212P50

ISLA212P25

ISLA212P20

ISLA212P13

µs

MODEL

Sleep Wake-up Time

RESOLUTION

(MSPS)

SPEED

500

250

200

130

250

200

130

500

250

200

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