CXA3572 Sony Corporation, CXA3572 Datasheet - Page 22

• Manufacturer Part Number: CXA3572
• Description: Driver/Timing Generator for Color LCD Panels
• Manufacturer: Sony Corporation

Description of Operation
1) RGB and Y/color difference signal processing block
Signal processing is comprised of picture, HUE, matrix, LPF/trap, contrast, OSD, sample-and-hold,
bright, sub-bright, sub-contrast and output circuits.
• Input signal mode switching
• NTSC/PAL switching
• Picture circuit
• HUE circuit
• Matrix circuit
• LPF circuit
• Trap circuit
• Contrast adjustment circuit
• OSD
The input mode (RGB input, Y/color difference input) can be switched by the serial communication settings.
(During internal sync separation signal input)
(During external sync signal input)
The input system (NTSC/PAL) can be switched by the serial communication settings.
This performs aperture correction for the Y signal. The center frequency to be corrected and the correction
amount are controlled by serial communication.
This is the hue adjustment circuit for the color difference signal. It is controlled by serial communication.
This circuit converts Y, R-Y and B-Y signals into RGB signals.
This is the band limitation filter for the RGB signal. It is used to eliminate the noise component generated at
the front end of this IC. The cut-off frequency can be controlled by serial communication. In addition, when
not using the LPF, it can be turned off by serial communication.
This is used to eliminate the DSP clock and RGB decoder carrier leak generated at the front end of this IC.
In addition, when not using the trap, it can be turned off by serial communication.
This adjusts the amplitude to set the input RGB signal to the appropriate output level.
This inputs the OSD pulses. There are two input threshold values: Vth1 (Vcc1
When an input exceeds Vth1, the corresponding output falls to the level specified by BLACK-LIMITER. When
an input exceeds Vth2, the corresponding output rises to the level specified by WHITE-LIMITER. Also, when
one of the RGB inputs exceeds Vth1, any signal outputs not exceeding Vth1 also fall to the level specified by
BLACK-LIMITER.
During RGB input:
During Y/color difference input: The Y signal is input to Pins 22 and 25, the B-Y signal to Pin 24, and
During RGB input:
During Y/color difference input: The Y signal is input to Pin 22, the B-Y signal to Pin 24, the R-Y signal
R signal to Pin 23.
the R-Y signal to Pin 23.
The G signal is input to Pin 22, the B signal to Pin 24, the R signal to
Pin 23, CSYNC/HD to Pin 25, and VD to Pin 34.
to Pin 23, CSYNC/HD to Pin 25, and VD to Pin 34.
The G signal is input to Pins 22 and 25, the B signal to Pin 24, and the
– 22 –
1/3) and Vth2 (Vcc1
correction,
CXA3572R
2/3).