ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 10

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Changes Summary
The following table captures the changes from the October 2004 issue.
38, 70, 72
39
68
70
Page
Section 12.1, “DPLL Timing Modes“ on
page 38
RCCR Register bits “FDM1 - 0” on page 70
RCCR Register bits “DPM1 - 0” on page 72
12.1.3.1, “Automatic Reference Switching
Without Preferences“ and 12.1.3.2,
“Automatic Reference Switching With
Preferences“
Table 31, Lock Detector Threshold
Register (LDTR) Bits
Table 34, Reference Change Control
Register (RCCR) Bits
Item
Zarlink Semiconductor Inc.
ZL50015
10
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The on-chip DPLL’s normal, holdover, automatic,
and freerun modes are now collectively referred
to as DPLL timing modes instead of operation
modes. This change is to avoid confusion with
the two main device operating modes; the
master and slave modes.
Section 12.1.3.1 and Section 12.1.3.2 added to
clarify the DPLL’s automatic reference switching
with and without preference operations in
Automatic Timing Mode.
Clarified threshold calculations.
Added description to clarify that only two
consecutive references can be used in
automatic timing mode with a preferred
reference.
Change
Data Sheet