CBT3306PW,118 NXP Semiconductors, CBT3306PW,118 Datasheet

IC FET BUS SWCH 2BIT 8-TSSOP

CBT3306PW,118

Manufacturer Part Number
CBT3306PW,118
Description
IC FET BUS SWCH 2BIT 8-TSSOP
Manufacturer
NXP Semiconductors
Series
74CBTr
Type
FET Bus Switchr
Datasheet

Specifications of CBT3306PW,118

Package / Case
8-TSSOP
Circuit
1 x 1:1
Independent Circuits
2
Current - Output High, Low
15mA, 64mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Switches
Dual
Propagation Delay Time
0.25 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Logic Family
CBT
Mounting Style
SMD/SMT
On Resistance (max)
15 Ohms
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935270498118
CBT3306PW-T
CBT3306PW-T

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Part Number
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Quantity
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Company:
Part Number:
CBT3306PW,118
Quantity:
100
1. General description
2. Features
3. Ordering information
Table 1.
4. Marking
Table 2.
Type number
CBT3306D
CBT3306PW
CBT3306GT
CBT3306GM
Type number
CBT3306D
CBT3306PW
CBT3306GT
CBT3306GM
Ordering information
Marking codes
Package
Name
SO8
TSSOP8
XSON8
XQFN8U
The CBT3306 dual FET bus switch features independent line switches. Each switch is
disabled when the associated output enable (nOE) input is HIGH.
The CBT3306 is characterized for operation from −40 °C to +85 °C.
CBT3306
Dual bus switch
Rev. 05 — 25 March 2010
5 Ω switch connection between two ports
TTL-compatible input levels
Multiple package options
Latch-up protection exceeds 100 mA per JESD78B
ESD protection:
HBM JESD22-A114F exceeds 2000 V
CDM JESD22-C101D exceeds 1000 V
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thin shrink small outline package; 8 leads;
body width 4.4 mm
plastic extremely thin small outline package; no leads; 8 terminals;
body 1 × 1.95 × 0.5 mm
plastic extremely thin quad flat package; no leads; 8 terminals;
body 1.6 × 1.6 × 0.5 mm
Marking code
CBT3306
3306
F06
F06
Product data sheet
Version
SOT96-1
SOT530-1
SOT833-1
SOT902-1

Related parts for CBT3306PW,118

CBT3306PW,118 Summary of contents

Page 1

CBT3306 Dual bus switch Rev. 05 — 25 March 2010 1. General description The CBT3306 dual FET bus switch features independent line switches. Each switch is disabled when the associated output enable (nOE) input is HIGH. The CBT3306 is characterized ...

Page 2

... NXP Semiconductors 5. Functional diagram Fig 1. Logic diagram 6. Pinning information 6.1 Pinning CBT3306 1OE GND 4 001aak303 Fig 2. Pin configuration for SO8 (SOT96-1) CBT3306 1OE GND 4 Transparent top view Fig 4. Pin configuration SOT833-1 (XSON8) CBT3306_5 Product data sheet 1OE 2OE 2OE Fig 2OE ...

Page 3

... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin 1OE, 2OE GND Functional description [1] Table 4. Function selection Input nOE HIGH voltage level LOW voltage level high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 4

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter V input clamping voltage IK I input leakage current I I supply current CC V pass voltage pass ΔI additional supply current CC C input capacitance I C off-state input/output io(off) capacitance ...

Page 5

... NXP Semiconductors 12. Waveforms Measurement points are given in Logic levels: V and Fig 6. The data input (nA, nB) to output (nB, nA) propagation delay times nOE input output LOW to OFF OFF to LOW output HIGH to OFF OFF to HIGH Measurement points are given in Logic levels: V and Fig 7. Enable and disable times Table 9 ...

Page 6

... NXP Semiconductors 13. Test information Test data is given in Table All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Z The outputs are measured one at a time with one transition per measurement. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance. ...

Page 7

... NXP Semiconductors 14. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 8

... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 9

... NXP Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1. 8× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 2.0 mm 0.5 0.04 0.17 1.9 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 10

... NXP Semiconductors XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm terminal 1 index area metal area not for soldering 2 1 terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.25 1.65 mm 0.5 0.00 ...

Page 11

... NXP Semiconductors 15. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model ESD ElectroStatic Discharge FET Field Effect Transistor HBM Human Body Model PRR Pulse Rate Repetition TTL Transistor-Transistor Logic 16. Revision history Table 12. Revision history Document ID Release date CBT3306_5 20100325 CBT3306_4 20100218 • ...

Page 12

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 13

... NXP Semiconductors 18. Contact information For more information, please visit: For sales office addresses, please send an email to: CBT3306_5 Product data sheet http://www.nxp.com salesaddresses@nxp.com Rev. 05 — 25 March 2010 CBT3306 Dual bus switch © NXP B.V. 2010. All rights reserved ...

Page 14

... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 13 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 6 14 Package outline ...

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