SSD1852T2R1 ETC [List of Unclassifed Manufacturers], SSD1852T2R1 Datasheet - Page 21

• Manufacturer Part Number: SSD1852T2R1
• Description: LCD Segment / Common Driver With Controller CMOS
• Manufacturer: ETC [List of Unclassifed Manufacturers]

SSD1852
7.11 Display Data Latch
7.12 HV Buffer Cell (Level Shifter)
7.13 Level Selector
7.14 LCD Panel Driving Waveform
hold the data, which will be fed to HV Buffer Cell and Level Selector to output the required
voltage levels. The number of latches are 128+129= 257
required driving voltage. The output is shifted out with an internal FRM clock that comes from
the Display Timing Generator. The voltage levels are given by the level selector which is
synchronized with the internal M signal.
separated into two sets and used with different cycles. Synchronization is important since it
selects the required LCD voltage level to the HV Buffer Cell, which in turn outputs the ROW or
SEG LCD waveform.
to a LCD panel. The waveforms are shown in Figure 8 illustrating the desired multiplex scheme
with N-line Inversion feature disabled (default).
This block is a series of latches carrying the display signal information. These latches
HV Buffer Cell works as a level shifter that translates the low voltage output signal to the
Level Selector is a control of the display synchronization. Display voltage can be
The following is an example of how the Common and Segment drivers may be connected
Rev 1.0
01/2003
SOLOMON
16