GS8644V72C-250I GSI [GSI Technology], GS8644V72C-250I Datasheet - Page 16

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GS8644V72C-250I

Manufacturer Part Number
GS8644V72C-250I
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
Notes:
1.
2.
3.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
Simplified State Diagram with G
W
CW
16/40
W
CR
R
CR
R
GS8644V18(B/E)/GS8644V36(B/E)/GS8644V72(C)
Deselect
X
CW
W
CW
W
R
CR
First Read
Burst Read
R
R
CR
X
X
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© 2003, GSI Technology

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