PSD913G2 STMICROELECTRONICS [STMicroelectronics], PSD913G2 Datasheet - Page 23

• Manufacturer Part Number: PSD913G2
• Description: Configurable Memory System on a Chip for 8-Bit Microcontrollers
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

The
PSD935G2
Functional
Blocks
(cont.)
22
PSD9XX Family
Figure 4. Data Polling Flow Chart
9.1.1.7.2 Data Toggle
Checking the Data Toggle bit on DQ6 is a method of determining whether a Program or
Erase instruction is in progress or has completed. Figure 5 shows the Data Toggle
algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD935G2 begins. The MCU then reads the location to be programmed in Flash to check
status. Data bit DQ6 of this location will toggle each time the MCU reads this location until
the embedded algorithm is complete. The MCU continues to read this location, checking
DQ6 and monitoring the Error bit on DQ5. When DQ6 stops toggling (two consecutive
reads yield the same value), and the Error bit on DQ5 remains ‘0’, then the embedded
algorithm is complete. If the Error bit on DQ5 is ‘1’, the MCU should test DQ6 again, since
DQ6 may have changed simultaneously with DQ5 (see Figure 5).
The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded
algorithm attempted to program, or if the MCU attempted to program a ‘1’ to a bit that was
not erased (not erased is logic ‘0’).
NO
Issue Reset Instruction
at VALID ADDRESS
READ DQ5 & DQ7
Operation Failed
Program/Erase
READ DQ7
DATA7
START
DATA
DQ7
DQ5
FAIL
DQ7
=
=1
=
YES
NO
NO
YES
YES
Program/Erase
Operation is
Completed
PASS
PSD935G2