EDD1232AABH ELPIDA [Elpida Memory], EDD1232AABH Datasheet - Page 27

• Manufacturer Part Number: EDD1232AABH
• Description: 128M bits DDR SDRAM (4M words x 32 bits)
• Manufacturer: ELPIDA [Elpida Memory]

Auto Precharge
Read with auto-precharge
The precharge is automatically performed after completing a read operation. The precharge starts tRPD (BL/2)
cycle after READA command input. tRAP specification for READA allows a read command with auto precharge to be
issued to a bank that has been activated (opened) but has not yet satisfied the tRAS (min) specification. A column
command to the other active bank can be issued the next cycle after the last data output. Read with auto-precharge
command does not limit row commands execution for other bank.
note(Notes.*14).
Write with auto-precharge
The precharge is automatically performed after completing a burst write operation. The precharge operation is
started (BL/ 2 + 4) cycles after WRITA command issued. A column command to the other banks can be issued the
next cycle after the internal precharge command issued. Write with auto-precharge command does not limit row
commands execution for other bank. Refer to the ‘Read with Auto-Precharge Enabled, Write with Auto-Precharge
Enabled’ section. Refer to ‘Function truth table and related note (Notes.*14).
Note: Internal auto-precharge starts at the timing indicated by "
Data Sheet E0533E50 (Ver. 5.0)
Note: Internal auto-precharge starts at the timing indicated by "
Command
Command
DQS
/CK
DQS
DM
DQ
CK
/CK
DQ
CK
ACT
ACT
tRAP (min) = tRCDRD (min)
tRCDWR (min)
NOP
WRITA
tRAS (min)
READA
Read with auto-precharge
Burst Write (BL = 4)
in1
2 cycles (= BL/2)
tRPD
in2
BL/2 + 4 cycles
tAC,tDQSCK
27
".
in3
".
NOP
in4
out0
NOP
Refer to ‘Function truth table and related
out1 out2
tRP (min)
out3
EDD1232AABH
tRP
ACT
BL = 4
ACT