EDD5104ABTA-6B ELPIDA [Elpida Memory], EDD5104ABTA-6B Datasheet - Page 32

• Manufacturer Part Number: EDD5104ABTA-6B
• Description: 512M bits DDR SDRAM
• Manufacturer: ELPIDA [Elpida Memory]

A Read command to the consecutive Write command interval with the BST command
1. Same
2. Same
3. Different
Preliminary Data Sheet E0237E30 (Ver. 3.0)
Command
Destination row of the consecutive write
command
Bank
address
DQS
/CK
DM
DQ
CK
Row address State
Same
Different
Any
READ
High-Z
t0
BST
ACTIVE
—
ACTIVE
IDLE
t1
tBSTW ( tBSTZ)
tBSTZ (= CL)
OUTPUT
NOP
READ to WRITE Command Interval
t2
Operation
Issue the BST command. tBSTW (≥ tBSTZ) after the BST command, the
consecutive write command can be issued.
Precharge the bank to interrupt the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive write command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
Issue the BST command. tBSTW (≥ tBSTZ) after the BST command, the
consecutive write command can be issued.
Precharge the bank independently of the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive write command can be issued.
out0 out1
WRIT
t3
32
in0
t4
EDD5104ABTA, EDD5108ABTA
in1
INPUT
in2
t5
in3
t6
NOP
t7
BL = 4
CL = 2
t8