HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 77

• Manufacturer Part Number: HT68F14
• Description: Enhanced I/O Flash Type MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Rev. 1.10
Bit 2~0
Bit 7~6
Bit 5~4
Name
POR
R/W
Bit
TM1C1 Register
T1RP2~T1RP0: TM1 CCRP 3-bit register, compared with the TM1 Counter bit 9~bit 7
Comparator P Match Period
These three bits are used to setup the value on the internal CCRP 3-bit register, which are then
compared with the internal counter's highest three bits. The result of this comparison can be
selected to clear the internal counter if the T1CCLR bit is set to zero. Setting the T1CCLR bit to
zero ensures that a compare match with the CCRP values will reset the internal counter. As the
CCRP bits are only compared with the highest three counter bits, the compare values exist in 128
clock cycle multiples. Clearing all three bits to zero is in effect allowing the counter to overflow at
its maximum value.
T1M1~T1M0: Select TM1 Operating Mode
These bits setup the required operating mode for the TM. To ensure reliable operation the TM
should be switched off before any changes are made to the T1M1 and T1M0 bits. In the
Timer/Counter Mode, the TM output pin control must be disabled.
T1IO1~T1IO0: Select TP1_0, TP1_1 output function
Compare Match Output Mode
PWM Mode/Single Pulse Output Mode
Capture Input Mode
Timer/counter Mode:
These two bits are used to determine how the TM output pin changes state when a certain
condition is reached. The function that these bits select depends upon in which mode the TM is
running.
In the Compare Match Output Mode, the T1IO1 and T1IO0 bits determine how the TM output
pin changes state when a compare match occurs from the Comparator A. The TM output pin can
be setup to switch high, switch low or to toggle its present state when a compare match occurs
from the Comparator A. When the bits are both zero, then no change will take place on the
output. The initial value of the TM output pin should be setup using the T1OC bit in the TM1C1
register. Note that the output level requested by the T1IO1 and T1IO0 bits must be different from
T1M1
R/W
000: 1024 TM1 clocks
001: 128 TM1 clocks
010: 256 TM1 clocks
011: 384 TM1 clocks
100: 512 TM1 clocks
101: 640 TM1 clocks
110: 768 TM1 clocks
111: 896 TM1 clocks
00: Compare Match Output Mode
01: Capture Input Mode
10: PWM Mode or Single Pulse Output Mode
11: Timer/Counter Mode
00: No change
01: Output low
10: Output high
11: Toggle output
00: PWM output inactive state
01: PWM output active state
10: PWM output
11: Single pulse output
00: Input capture at rising edge of TP1_0, TP1_1
01: Input capture at falling edge of TP1_0, TP1_1
10: Input capture at falling/rising edge of TP1_0, TP1_1
11: Input capture disabled
Unused
7
0
T1M0
R/W
6
0
T1IO1
R/W
5
0
T1IO0
77
R/W
4
0
Enhanced I/O Flash Type MCU
HT68F13/HT68F14/HT68F15
T1OC
R/W
3
0
T1POL
R/W
2
0
T1DPX
R/W
1
0
February 9, 2011
T1CCLR
R/W
0
0