HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 94

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HT68F14

Manufacturer Part Number
HT68F14
Description
Enhanced I/O Flash Type MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet

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HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
Note:
Rev. 1.10
Compare Output Mode
1. With TnCCLR=0 a Comparator P match will clear the counter
2. The TPnA output pin is controlled only by the TnAF flag
3. The output pin is reset to its initial state by a TnON bit rising edge
Flag TnPF
Flag TnAF
CCRP Int.
CCRA Int.
TPnA O/P
TnAPOL
TnPAU
0x3FF
CCRP
CCRA
TnON
Counter Value
To select this mode, bits TnAM1, TnAM0 and TnBM1, TnBM0 in the TMnC1/TMnC2 registers
should be all cleared to zero. In this mode once the counter is enabled and running it can be cleared by
three methods. These are a counter overflow, a compare match from Comparator A and a compare
match from Comparator P. When the TnCCLR bit is low, there are two ways in which the counter can
be cleared. One is when a compare match occurs from Comparator P, the other is when the CCRP bits
are all zero which allows the counter to overflow. Here both the TnAF and TnPF interrupt request flags
for Comparator A and Comparator P respectively, will both be generated.
If the TnCCLR bit in the TMnC1 register is high then the counter will be cleared when a compare
match occurs from Comparator A. However, here only the TnAF interrupt request flag will be
generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when
TnCCLR is high no TnPF interrupt request flag will be generated.
Pin
Output pin set to
initial Level Low
if TnAOC=0
CCRP=0
ETM CCRA Compare Match Output Mode -- TnCCLR = 0
Counter overflow
Here TnAIO [1:0] = 11
Toggle Output select
Output Toggle with
TnAF flag
CCRP > 0
Note TnAIO [1:0] = 10
Active High Output select
CCRP > 0
Counter cleared by CCRP value
94
Output not affected by TnAF
flag. Remains High until reset
by TnON bit
Pause
Resume
TnCCLR = 0; TnAM [1:0] = 00
Stop
Output controlled by
other pin-shared function
Counter
Restart
Output Pin
Reset to Initial value
Output Inverts
when TnAPOL is high
February 9, 2011
Time

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