EX256-CS100 ACTEL [Actel Corporation], EX256-CS100 Datasheet
EX256-CS100
Related parts for EX256-CS100
EX256-CS100 Summary of contents
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... Prevents Reverse Engineering and Design Theft eX64 eX128 3,000 6,000 2,000 4,000 64 128 128 256 128 256 84 100 Std. Std 64, 100 64, 100 49, 128 49, 128 ™ Technology eX256 12,000 8,000 256 512 512 132 1 2 Std. A 100 128, 180 eX i ...
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... Plastic Device Resources Device 64-Pin TQFP eX64 41 eX128 46 eX256 — Note: Package Definitions: TQFP = Thin Quad Flat Pack, CSP = Chip Scale Package Speed Grade and Temperature Grade Matrix A Note: Refer to the eX Family FPGAs datasheet for more details on commercial- and industrial-grade offerings. ...
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Table of Contents eX Automotive Family FPGAs General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Automotive Family FPGAs General Description Based on a 0.22 µm CMOS process technology, the eX family of FPGAs is a low-cost solution for low-power, high-performance designs. With temperature grade support (–40ºC to 125ºC), the eX devices can address many ...
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Automotive Family FPGAs Module Organization C-cell and R-cell logic modules are arranged into horizontal banks called Clusters, each of which contains two C-cells and one R-cell in a C-R-C configuration. Clusters are further organized into modules called SuperClusters for ...
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R-Cell Routed S1 Data Input S0 DirectConnect Input HCLK CLKA, CLKB, Internal Logic CKS CKP Figure 1-3 • Cluster Organization SuperClusters Figure 1-4 • DirectConnect and FastConnect for SuperClusters D0 D1 PSET CLR DB Cluster ...
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Automotive Family FPGAs Clock Resources eX’s high-drive routing structure provides three clock networks. The first clock, called HCLK, is hardwired from the HCLK buffer to the clock select MUX in each R-cell. HCLK cannot be connected to combinational logic. ...
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Other Architectural Features Performance The combination of the various architectural features enables automotive-grade eX devices to operate with internal clock frequencies at 250 MHz for fast execution of complex logic functions. Automotive-grade eX devices are the optimal platforms upon which ...
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... V, device tested at room temperature. CCA CCI Figure 1-9 • eX Dynamic Power Consumption – Low Frequency 1 -6 show some sample power characteristics of eX devices. 300 250 200 150 100 100 150 200 Frequency (MHz Frequency (MHz) v3.2 eX64 eX128 eX256 eX64 eX128 eX256 50 ...
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Figure 1-10 • Total Dynamic Power (mW Figure 1-11 • System Power at 5%, 10%, and 15% Duty Cycle 50 ...
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Automotive Family FPGAs Boundary Scan Testing (BST) All eX devices are IEEE 1149.1 compliant. eX devices offer superior diagnostic and testing capabilities by providing Boundary Scan Testing (BST) and probing capabilities. These functions are controlled through the special test ...
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... Programming Device programming is supported through Silicon Sculptor series of programmers. In particular, Silicon Sculptor compact, robust, single-site and multi-site device programmer for the PC. With standalone software, Silicon Sculptor II allows concurrent programming of multiple units from the same PC, ensuring the fastest programming times possible ...
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Automotive Family FPGAs Silicon Explorer II Probe Silicon Explorer integrated hardware and software solution that, in conjunction with Actel Designer software tools, allows users to examine any of the internal nets of the device while it ...
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Development Tool Support The automotive-grade eX family of FPGAs is fully supported by both the Actel Libero® Integrated Design Environment (IDE) and Designer FPGA Development software. Actel Libero IDE is a design management environment, seamlessly integrating design tools while guiding ...
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... A-grade parts are not tested at extended temperatures. If testing to ensure guaranteed operation at extended temperatures is required, please contact your local Actel Sales office to discuss testing options available. Table 1-10 • Typical Automotive-Grade eX Standby Current at 25°C Product eX64 eX128 eX256 Automotive –40 to +125 2.3 to 2.7 3 ...
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V LVCMOS2 Electrical Specifications Symbol Parameter MIN CCI MIN CCI Input Low Voltage OUT ...
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Automotive Family FPGAs 5 V Tolerance of 3.3 V LVTTL I/Os Using a Tristate Buffer Input: 3.3 V LVTTL I/Os are 5-V-input tolerant only if the non-PCI mode is used (no clamp diode). Output: To configure an Actel eX ...
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... Average input buffer switching frequency, typically F Average output buffer switching frequency, typically F/5 fq1 = Frequency of routed clock A eX128 eX256 fq2 = Frequency of routed clock B fs1 = Frequency of dedicated array clock 0.85 pF 0.85 pF The eX, SX-A and RTSX-S Power Calculator can be used to estimate the total power dissipation (static and dynamic devices and can be found at http://www ...
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Automotive Family FPGAs Package Thermal Characteristics The device junction-to-case thermal characteristic is θ and the junction-to-ambient air characteristic is θ thermal characteristics for θ are shown with two ja different air flow rates. θ is provided for reference. jc ...
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Timing Model Input Delays I/O Module t = 1.3 ns INYH Routed t = 2.3 ns RCKH Clock (100% Load) I/O Module t = 1.3 ns INYH Hardwired Clock t = 1.8 ns HCKH Note: *Values shown for eX128, ...
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Automotive Family FPGAs Output Buffer Delays 50% 50% GND V OH 1.5 V 1.5 V Out DLH t DHL Table 1-13 • Output Buffer Delays AC Test Loads Load 1 (used to measure ...
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Input Buffer Delays PAD INBUF 3V In 1 Out 50% GND t t INY INY Table 1-14 • Input Buffer Delays Cell Timing Characteristics D t SUD CLK Q CLR PRESET Figure 1-17 • Flip-Flops ...
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Automotive Family FPGAs Timing Characteristics Timing characteristics for eX devices fall into three categories: family-dependent, device-dependent, and design-dependent. The input characteristics are common to all eX family members. Internal routing delays are device-dependent. Design dependency means actual delays are ...
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Family Timing Characteristics Table 1-17 • eX Family Timing Characteristics (Worst-Case Automotive Conditions, V Parameter Description 1 C-Cell Propagation Delays t Internal Array Module PD 2 Predicted Routing Delays t FO=1 Routing Delay, DirectConnect DC t FO=1 Routing Delay, ...
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Automotive Family FPGAs Table 1-17 • eX Family Timing Characteristics (Worst-Case Automotive Conditions, V Parameter Description t FO=4 Routing Delay IRD4 t FO=8 Routing Delay IRD8 t FO=12 Routing Delay IRD12 Dedicated (Hardwired) Array Clock Networks t Input Low ...
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Table 1-17 • eX Family Timing Characteristics (Worst-Case Automotive Conditions, V Parameter Description t Enable-to-Pad ENZL t Enable-to-Pad Z to L—Low Slew ENZLS t Enable-to-Pad ENZH t Enable-to-Pad ENLZ t Enable-to-Pad, ...
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Automotive Family FPGAs Pin Description CLKA/B Routed Clock A and B These pins are clock inputs for clock distribution networks. Input levels are compatible with LVTTL and LVCMOS specifications. The clock input is buffered prior to clocking the R-cells. ...
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Package Pin Assignments 64-Pin TQFP 64 1 Figure 2-1 • 64-Pin TQFP Note For Package Manufacturing and Environmental information, visit the Resource Center at http://www.actel.com/products/rescenter/package/index.html. eX Automotive Family FPGAs 64-Pin TQFP v3.2 2-1 ...
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Automotive Family FPGAs 64-Pin TQFP eX64 Pin Number Function 1 GND 2 TDI, I/O 3 I/O 4 TMS 5 GND 6 V CCI 7 I TRST, I ...
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TQFP 100 1 Figure 2-2 • 100-Pin TQFP (Top View) Note For Package Manufacturing and Environmental information, visit the Resource Center at http://www.actel.com/products/rescenter/package/index.html. eX Automotive Family FPGAs 100-Pin TQFP v3.2 2-3 ...
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... I/O 48 I/O 49 I/O 50 TRST, I/O 51 I/O 52 I CCI CCI I/O 56 I/O 57 I/O 58 I/O 59 I/O 60 I/O 61 I/O 62 I/O 63 I/O 64 I/O 65 I/O 66 I/O 67 I/O 68 PRB, I CCA v3.2 100-Pin TQFP eX64 eX128 eX256 Function Function Function GND GND GND I/O I/O I/O HCLK HCLK HCLK I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I CCI CCI CCI I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O TDO, I/O TDO, I/O TDO, I/O NC I/O I/O GND GND ...
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... NC I/O 77 I/O I/O 78 I/O I/O 79 I/O I/O 80 I/O I/O 81 I/O I CCI CCI 83 I/O I/O 84 I/O I/O 85 I/O I/O 86 I/O I/O 87 CLKA CLKA 88 CLKB CLKB CCA CCA 91 GND GND 92 PRA, I/O PRA, I/O 93 I/O I/O 94 I/O I/O 95 I/O I/O 96 I/O I/O 97 I/O I/O 98 I/O I/O 99 I/O I/O 100 TCK, I/O TCK, I/O eX256 Function I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O V CCI I/O I/O I/O I/O CLKA CLKB NC V CCA GND PRA, I/O I/O I/O I/O I/O I/O I/O I/O TCK, I/O v3.2 eX Automotive Family FPGAs 2-5 ...
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Automotive Family FPGAs 49-Pin CSP A1 Ball Pad Corner Figure 2-3 • 49-Pin CSP (Top View) Note For Package Manufacturing and Environmental information, visit the Resource Center at http://www.actel.com/products/rescenter/package/index.html ...
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CSP eX64 Pin Number Function A1 I/O A2 I/O A3 I CCA A6 I/O A7 I/O B1 TCK, I/O B2 I/O B3 I/O B4 PRA, I/O B5 CLKA B6 I/O B7 GND C1 I/O C2 ...
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Automotive Family FPGAs 128-Pin CSP A1 Ball Pad Corner Figure 2-4 • 128-Pin CSP (Top View) Note For Package Manufacturing and Environmental information, visit the Resource Center ...
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... TMS D12 I/O E1 I/O E2 I/O E3 I/O E4 PRA, I/O E9 CLKB E10 I/O E11 I/O E12 I/O F1 GND F2 I/O F3 I/O F4 TDI, I/O F9 I/O F10 I/O F11 I/O F12 CLKA G1 I/O G2 TRST, I/O I/O G3 I/O G4 I/O G9 I/O G10 v3.2 eX Automotive Family FPGAs 128-Pin CSP eX128 eX256 Function Function I/O I/O I/O NC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND GND GND I/O I/O I/O GND GND GND I/O I/O I/O I/O I/O I/O I/O I/O I CCI CCI CCI NC I/O I CCI ...
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... L1 I CCI CCI V L4 CCA I CCA I CCI CCI I/O L9 I/O L10 I/O L11 GND L12 I/O M1 GND M2 I/O M3 I/O M4 I/O M5 I/O M6 I/O M7 I/O M8 I/O M9 I/O M10 PRB, I/O M11 HCLK M12 v3.2 128-Pin CSP eX64 eX128 eX256 Function Function Function I/O I/O I/O I/O I/O I/O I/O I/O I/O TDO, I/O TDO, I/O TDO, I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O NC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O NC I/O I CCI CCI CCI ...
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CSP A1 Ball Pad Corner Figure 2-5 • 180-Pin CSP Note For Package Manufacturing and Environmental information, visit the Resource Center at http://www.actel.com/products/rescenter/package/index.html ...
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... D13 I/O G12 D14 I/O G13 E1 I/O G14 GND H10 E8 I/O H11 E9 GND H12 E10 I/O H13 v3.2 180-Pin CSP eX256 Pin eX256 Function Number Function I/O H14 I/O I GND CCI I/O J3 I/O I CCI I/O J5 GND V J10 I/O CCI I/O J11 V CCI GND J12 V CCA GND J13 I/O I/O ...
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... L12 TDO, I/O P3 L13 I/O P4 L14 I/O P10 M6 I/O P11 M7 I/O P12 M8 I/O P13 M9 I/O M10 I/O M11 I/O M12 I/O M13 V CCI M14 I/O N1 I/O N2 GND N3 I/O N4 I/O N5 I/O N6 I CCA N9 I/O N10 I/O N11 I/O N12 I/O N13 I/O 180-Pin CSP eX256 Function I/O I/O I/O I GND I/O v3.2 eX Automotive Family FPGAs 2-13 ...
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... Description" section Datasheet Categories In order to provide the latest information to designers, some datasheets are published before data has been fully characterized. Datasheets are designated as "Product Brief," "Advanced," "Production," and "Datasheet Supplement." The definitions of these categories are as follows: ...
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Actel and the Actel logo are registered trademarks of Actel Corporation. All other trademarks are the property of their owners. Actel Corporation Actel Europe Ltd. 2061 Stierlin Court Dunlop House, Riverside Way Mountain View, CA Camberley, Surrey GU15 3YL 94043-4655 ...