ISL267440IUZ-T7A Intersil, ISL267440IUZ-T7A Datasheet - Page 14

no-image

ISL267440IUZ-T7A

Manufacturer Part Number
ISL267440IUZ-T7A
Description
Analog to Digital Converters - ADC 10 BIT 1MSPS SAR ADC IN 8LD
Manufacturer
Intersil
Datasheet

Specifications of ISL267440IUZ-T7A

Product Category
Analog to Digital Converters - ADC
Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
1 Msps
Resolution
10 bit
Input Type
Differential
Snr
No
Interface Type
Serial (SPI)
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 85 C
Package / Case
MSOP
Maximum Power Dissipation
8.5 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
External
Power vs Throughput Rate
The ISL267440 and ISL267450A provide reduced power
consumption at lower conversion rates by automatically
switching into a low-power mode after completing a conversion.
The average power consumption of the ADC decreases at lower
throughput rates. Figure 31 shows the typical power
consumption over a wide range of throughput rates.
0.01
FIGURE 31. POWER CONSUMPTION vs THROUGHPUT RATE
100
0.1
10
1
0
50
100
THROUGHPUT (Ksps)
V
DD
14
= 3V
150
V
200
DD
= 5V
ISL267440, ISL267450A
250
FIGURE 29. ISL267450A SYSTEM TIMING
FIGURE 30. ISL267440 SYSTEM TIMING
300
350
Serial Digital Interface
Conversion data is accessed with an SPI-compatible serial
interface. The interface consists of the serial clock (SCLK), serial
data output (SDATA), and chip select (CS).
The serial interface is designed around using 16 SCLK cycles to
perform an autozero on the SAR comparator and additional SCLK
cycles for SAR comparator decisions (12 SLCKs in the 12-bit
device, 10 SCLKs in the 10-bit device, and 8 SCLKs in the 8-bit
device). If short cycling is not used, all converter throughput
cycles take 16 SCLKs. The SDATA output goes low after the last
conversion decision has been presented to the SDATA output, as
shown in Figures 29 and 30.
June 28, 2012
FN7708.2

Related parts for ISL267440IUZ-T7A