IS46TR16128A-15HBLA2 ISSI, IS46TR16128A-15HBLA2 Datasheet - Page 60

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IS46TR16128A-15HBLA2

Manufacturer Part Number
IS46TR16128A-15HBLA2
Description
DRAM 2G, 1.5v, 1333MT/s 128Mx16 DDR3
Manufacturer
ISSI

Specifications of IS46TR16128A-15HBLA2

Rohs
yes
Data Bus Width
16 bit
Organization
128 M x 16
Package / Case
FBGA-96
Memory Size
2 Gbit
Maximum Clock Frequency
933 MHz
Access Time
13.125 ns
Supply Voltage - Max
1.575 V
Supply Voltage - Min
1.425 V
Maximum Operating Current
65 mA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
IS43/46TR16128A, IS43/46TR16128AL,
IS43/46TR82560A, IS43/46TR82560AL
Minimum CKE low width for Self Refresh entry
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A
11/14/2012
Exit Self Refresh to commands not requiring a
ACTIVE to ACTIVE command period for 1KB
ACTIVE to ACTIVE command period for 2KB
Valid Clock Requirement before Self Refresh
Exit Precharge Power Down with DLL frozen
command; Exit Precharge Power Down with
Auto precharge write recovery + precharge
ACTIVE to PRECHARGE command period
Command and Address hold time from CK,
Valid Clock Requirement after Self Refresh
Exit Self Refresh to commands requiring a
Command and Address setup time to CK,
Command and Address setup time to CK,
Exit Power Down with DLL on to any valid
Control and Address Input pulse width for
CK# referenced to Vih(ac) / Vil(ac) levels
CK# referenced to Vih(dc) / Vil(dc) levels
CK# referenced to Vih(ac) / Vil(ac) levels
Entry (SRE) or Power-Down Entry (PDE)
Exit (SRX) or Power-Down Exit (PDX) or
DLL frozen to commands not requiring a
Four activate window for 1KB page size
Four activate window for 2KB page size
Normal operation Short calibration time
Multi-Purpose Register Recovery Time
Power-up and RESET calibration time
Normal operation Full calibration time
Exit Reset from CKE HIGH to a valid
to commands requiring a locked DLL
Power Down Entry to Exit Timing
Command pass disable delay
CKE minimum pulse width
Power Down Timings
Self Refresh Timings
Calibration Timing
Reset Timing
to exit timing
locked DLL
locked DLL
locked DLL
Parameter
each input
Reset Exit
page size
page size
command
time
tDAL(min)
tIS(base)
tIH(base)
tIS(base)
tZQoper
tCKESR
tCKSRE
tCKSRX
tCPDED
tXSDLL
tXPDLL
Symbol
tMPRR
AC150
tZQCS
tZQinit
tRRD
tRRD
tFAW
tFAW
tRAS
tXPR
tCKE
tIPW
tXS
tXP
tPD
max(4nCK,
tCKEmin.: max(3nCK
DDR3/DDR3L-800
Min.
10ns)
tXPRmin.: max(5nCK, tRFC(min) + 10ns)
900
512
256
tXSmin.: max(5nCK, tRFC(min) + 10ns)
See table for ADD/CMD setup and hold
40
50
64
1
tCKEmax.: -
tCKESRmin.: tCKE(min) + 1 nCK
tCKSREmin.: max(5 nCK, 10 ns)
tCKSRXmin.: max(5 nCK, 10 ns)
tXPDLLmin.: max(10nCK, 24ns)
WR + roundup(tRP / tCK(avg))
7.5ns)
tRRDmin.: max(4nCK, 10ns)
tXPmin.: max(3nCK, 7.5ns)
tXSDLLmin.: tDLLK(min)
Standard Speed Bins
tPDmin.: tCKE(min)
tPDmax.: 9*tREFI
Max.
tCPDEDmax.: -
tCKESRmax.: -
tCKSREmax.: -
tCKSRXmax.: -
tCPDEDmin.: 1
tXSDLLmax.: -
tXPDLLmax.: -
tXPRmax.: -
-
-
-
-
-
-
-
-
tRRDmax.:
tXSmax.: -
tXPmax.: -
max(4nCK,
tCKEmin.: max(3nCK
DDR3/DDR3L-1066
Min.
7.5ns)
37.5
780
512
256
50
64
tCKEmax.: -
1
5.625ns)
Max.
-
-
-
-
-
-
-
-
Units
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
ns
ps
ps
ps
ps
60
b,16,27
Notes
b,16
b,16
22
28
23
15
e
e
e
e
e
2

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