C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 171

• Manufacturer Part Number: C8051F966-A-GQ
• Description: 8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
• Manufacturer: Silicon Labs

Specifications of C8051F966-A-GQ

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24.5 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT

13.6. Using CRC1 with SFR Access
The steps to perform a CRC using SFR access with the CRC1 module is as follow:
Note that all of the CRC1 SFRs are on SFR page 0x2.
13.7. Using the CRC1 module with the DMA
The steps to computing a CRC using the DMA are as follows.
1. If desired, set the SEED bit in the CRC1CN SFR to seed with 0xFFFF.
2. Clear the CRC module by setting the CLR bit in the CRC1CN SFR.
3. Clear the SEED bit, if set previously in step 1.
4. Write the polynomial to CRC1POLH:L.
5. Write all data bytes to CRC1IN.
6. If desired, invert and/or flip the final results using the INV and FLIP bits.
7. Read the final CRC results from CRC1OUTH:L.
8. Clear the INV and/or FLIP bits, if set previously in step 6.
1. If desired, set the SEED bit in CRC1CN to seed with 0xFFFF.
2. Clear the CRC module by setting the CLR bit in CRC1CN SFR.
3. Clear the SEED bit, if set previously in step 1.
4. Write the polynomial to CRC1POLH:L.
5. Configure the DMA for the CRC operation:
6. Set the DMA mode bit (bit 3) in the CRC1CN SFR to initiate the CRC operation.
7. Wait on the DMA interrupt.
8. If desired, invert and/or flip the final results using the INV and FLIP bits.
9. Read the final results from CRC1OUTH:L.
10. Clear the INV and/or FLIP bits, if set previously in step 8.
a. Disable the desired DMA channel by clearing the corresponding bit in DMA0EN.
b. Select the desired DMA channel by writing to DMA0SEL.
c. Configure the selected DMA channel to use the CRC1IN peripheral request by writing 0x2 to
d. Enable the DMA interrupt on the selected channel by setting bit 7 of DMA0NCF.
e. Write 0 to DMA0NMD to disable wrapping.
f.
g. Write the size of the CRC data in bytes to DMA0NSZH:L.
h. Clear the address offset SFRs DMA0A0H:L.
i.
j.
k. Enable DMA interrupts by setting bit 5 of EIE2.
DMA0NCF.
Write the address of the first byte of CRC data to DMA0NBAH:L.
Enable the interrupt on the desired channel by setting the corresponding bit in DMA0INT.
Enable the desired channel by setting the corresponding bit in DMA0EN.
Rev. 0.5
C8051F96x
171