C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 208

• Manufacturer Part Number: C8051F966-A-GQ
• Description: 8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
• Manufacturer: Silicon Labs

Specifications of C8051F966-A-GQ

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24.5 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT

C8051F96x
15.1. Manchester Encoding
To encode Manchester Data, first clear the MODE bit for Manchester encoding or decoding.
To encode, one byte of data is written to the data register ENC0L.
Setting the ENC bit will initiate encoding. After encoding, the encoded data will be in ENC0M and ENC0L.
The upper nibble of the input data is encoded and placed in ENC0M. The lower nibble is encoded and
placed in ENC0L.
Note that the input data should be readable in the data register until the encode bit is set. Once the READY
bit is set, the input data has been replaced by the output data.
The ENC and DEC bits are self clearing. The READY bit is not cleared by hardware and must be cleared
manually. The control register does not need to be bit addressable. The READY bit can be cleared while
setting the ENC or DEC bit using a direct or immediate SFR mov instruction.
208
dec
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
Input Data
hex
nibble
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
Table 15.2. Manchester Encoding
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
bin
Rev. 0.5
10101010
10101001
10100101
10010101
01010101
10100110
10011010
10011001
10010110
01101010
01101001
01100101
01011010
01011001
01010110
01100110
bin
Encoded Output
byte
hex
AA
A9
A6
A5
9A
6A
5A
99
96
95
69
66
65
59
56
55
dec
170
169
166
165
154
153
150
149
106
105
102
101
90
89
86
85