ISL3036EIRZ-TK Intersil, ISL3036EIRZ-TK Datasheet - Page 9

• Manufacturer Part Number: ISL3036EIRZ-TK
• Description: IC LEVEL TRANSLATOR 4CH 14-TQFN
• Manufacturer: Intersil

Specifications of ISL3036EIRZ-TK

• Logic Function: Translator, Bidirectional
• Number Of Bits: 5
• Input Type: Logic
• Output Type: Logic
• Data Rate: 100Mbps
• Number Of Channels: 1
• Number Of Outputs/channel: 5
• Differential - Input:output: No/No
• Voltage - Supply: 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-VQFN
• Supply Voltage: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

applications). The low static pull-up current is easily
overdriven by an active pull-down, and the feedback nature
of the accelerators (i.e., the accelerator firing in one direction
also triggers the accelerator in the opposite direction) aids
the passive pull-up once the input signal passes the
accelerator’s high threshold. The pull-up current and load
capacitance set the input signal rise time, and thus the
maximum data rate. For slow data rates the internal pull-up
current may suffice, but higher data rates - or more heavily
loaded signal lines - may require an external pull-up resistor.
Using External Bus Resistors
As mentioned earlier, these level translators incorporate I/O
pin pull-up current sources when enabled, and I/O pin
pull-up resistors in SHDN (except for the ISL3035E’s I/OV
pins). Therefore, external pull-up or pull-down resistors
shouldn’t be necessary, and aren’t recommended, unless
using high-speed open drain signaling.
Power Supplies
WIDE SUPPLY RANGE
These ICs operate from a wide range of supply voltages.
V
2.5V powered devices, while V
3.3V components. Remember that V
than V
POWER SUPPLY SEQUENCING
Either V
remains in SHDN until V
200mV. V
causing any damage.
I/O PIN INPUT THRESHOLDS VS SUPPLY VOLTAGE
Even though the “Electrical Specification” table on page 4
shows the I/O pin input thresholds (V
delta from the supplies or GND, the thresholds are better
represented as a percentage of the supplies. The typical
I/OV
while the corresponding V
typical I/OV
while the corresponding V
Low Power SHDN Mode
This family of level translators features a low power SHDN
mode that tri-states all the I/O and output pins, considerably
reduces current consumption, and enables any pull-up
resistors on a port’s I/O pins (see Table 1). The ISL3034E
and ISL3036E enter the SHDN mode when the EN input
switches low, or automatically when the V
below the V
enters SHDN only if V
powers the EN circuitry.
ISL3034E and ISL3036E
The ISL3034E and ISL3036E are general purpose level
translators featuring an enable pin, and six or four channels,
L
is designed to connect to the supply of 1.5V, 1.8V, and
CC
L
CC
and CLK_V
for proper operation.
L
may exceed V
L
or V
L
and CLK_V
voltage. The ISL3035 has no enable pin, so it
L
may be powered up first, but the IC
CC
CC
V
CC
IH
L
drops below V
CC
IL
IL
V
runs about 55% to 60% of V
IH
exceeds V
runs about 33% of V
runs about 25% to 35% of V
by as much as 4V without
9
runs about 60% to 70% of V
CC
is targeted for 2.5V, and
CC
IH
L
, V
L
by as much as
must be greater
. The V
CC
IL
ISL3034E, ISL3035E, ISL3036E
) with a fixed
voltage drops
L
CC
supply
. The
CC
L
CC
.
L
,
,
respectively. Both products include SHDN mode 16.5kΩ
pull-ups on the I/OV
ISL3035E
The ISL3035E specifically targets memory card applications,
and Figure 6 illustrates its use in an SD Card application.
Instead of six general purpose channels, the ISL3035E
features five general purpose channels and one dedicated
CLK channel. In memory card applications, the CLK channel
is a unidirectional signal driven by the host controller and
used by the memory card to synchronize data reads and
writes. The ISL3035E’s CLK channel is unique in that the
host CLK applied to the CLK_V
card via the CLK_V
on the CLK_RET pin. This CLK_RET signal better mimics
the timing of “read” data returned from the memory card (see
Figure 21 for signal timing), so using CLK_RET as the host’s
input CLK improves the CLK to data timing relationship.
CLK_RET is strictly an output, and CLK_V
input. If an ISL3035E application needs a sixth I/O channel
then the user needs to connect CLK_V
together. Connected this way, the combination channel has the
same architecture as the other I/O channels. Both CLK_RET
and CLK_V
SHDN pull-up resistors, so connecting these two pins together
doubles the pull-up current in either mode.
The bit-by-bit auto direction control eliminates the need for
GPIO signals to control the flow of data on the CMD and
DAT lines.
The ISL3035E has no enable pin, so it only enters the low
power SHDN mode when V
SHDN pull-up resistors on the I/OV
but there are 75kΩ pull-ups on the I/OV
CLK_RET pins.
CONTROLLER
HOST
+1.8V
SYSTEM
FIGURE 6. ISL3035E IN AN SD CARD APPLICATION
CLOCK_IN
+1.8V
GND
CLOCK
DAT3
DAT2
DAT1
DAT0
CMD
L
have equivalent pull-up current sources and
1
µF
CC
CC
0.1
CLK_RET
CLK_V L
I/OV L_
I/OV L_
I/OV L_
I/OV L_
I/OV L_
pin, but it also loops back to the host
and I/OV
µF
V L
ISL3035E
CC
GND
drops below V
L
CLK_V CC
L
V CC
pin routes to the memory
I/OV CC_
I/OV CC_
I/OV CC_
I/OV CC_
I/OV CC_
pins.
CC
L
and CLK_V
and CLK_RET
L
, CLK_V
0.1
L
µF
is strictly an
L
. There are no
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
1
SD CARD
L
March 31, 2009
µF
, and
CC
+3.3V
GND
+3.3V
FN6492.0
pins,