AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 111

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

17.1
17.2
3714A–MICRO–7/11
Multiprocessor Communications
Baud Rates
Modes 2 and 3 have a special provision for multiprocessor communications. In these modes,
9 data bits are received, followed by a stop bit. The 9th bit goes into RB8. Then comes a stop bit.
The port can be programmed such that when the stop bit is received, the serial port interrupt is
activated only if RB8 = 1. This feature is enabled by setting bit SM2 in SCON.
The following example shows how to use the serial interrupt for multiprocessor communications.
When the master processor must transmit a block of data to one of several slaves, it first sends
out an address byte that identifies the target slave. An address byte differs from a data byte in
that the 9th bit is “1” in an address byte and “0” in a data byte. With SM2 = 1, no slave is
interrupted by a data byte. An address byte, however, interrupts all slaves. Each slave can
examine the received byte and see if it is being addressed. The addressed slave clears its SM2
bit and prepares to receive the data bytes that follows. The slaves that are not addressed set
their SM2 bits and ignore the data bytes.
The SM2 bit can be used to check the validity of the stop bit in Mode 1. In a Mode 1 reception, if
SM2 = 1, the receive interrupt is not activated unless a valid stop bit is received.
The baud rate in Mode 0 depends on the value of the SMOD1 bit in Special Function Register
PCON.7. If SMOD1 = 0 (the value on reset) and TB8 = 0, the baud rate is 1/4 of the system fre-
quency in Fast mode. If SMOD1 = 1 and TB8 = 0, the baud rate is 1/2 of the system frequency,
as shown in the following equation:
In Compatibility mode the baud rate is 1/6 of the system frequency, scaling to 1/3 when
SMOD1 = 1.
Mode 0 can also be generated from either Timer 1 or the Internal Baud Rate Generator by
setting TB8 in SCON or SRC in BDRCON respectively.
The baud rate in Mode 2 also depends on the value of the SMOD1 bit. If SMOD1 = 0, the baud
rate is 1/32 of the system frequency. If SMOD1 = 1, the baud rate is 1/16 of the system fre-
quency, as shown in the following equation:
The baud rate in Modes 1 and 3 is generated from one of Timer 1, Timer 2 or the Internal Baud
Rate Generator as detailed in
Mode 0 Baud Rate
Mode 0 Baud Rate
Mode 2 Baud Rate
TB8 = 0
TB8 = 0
AT89LP51RD2/ED2/ID2 Preliminary
Table
17-2.
See “Automatic Address Recognition” on page 116.
=
=
=
2
------------------- -
2
------------------- -
2
------------------- -
SMOD1
SMOD1
SMOD1
32
4
6
×
×
×
System Frequency
System Frequency
System Frequency
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