AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 196

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

24.4.2.5
196
AT89LP51RD2/ED2/ID2 Preliminary
Programming the Flash Code Space
Figure 24-2. Page Programming Structure
Any number of data bytes from 1 to 64 can be loaded into the temporary page buffer. This pro-
vides the capability to program the whole memory by byte, by half-page or by any number of
bytes in a half-page. Note that once loaded, a buffer location cannot be reloaded with another
value. The page buffer is automatically cleared after each erase/write operation.
By default no erase is performed prior to writing the page buffer contents to the Flash array. Any
unloaded locations remain unchanged. Any zeroes in the loaded locations will be written to the
desired page. The auto-erase bit AERS (EECON.6) can be set to one to perform a page erase
automatically at the beginning of any write sequence. The page erase will erase the entire page,
i.e. both the low and high half pages. However, the write operation paired with the auto-erase
can only program one of the half pages. A second write cycle without auto-erase is required to
update the other half page. When AERS = 1 any unloaded locations will be left blank (FFH) after
the operation completes.
The following procedure is used to load the page buffer and is summarized in
The following procedure is used to program the User code space and is summarized in
24-4:
1. Save then disable interrupts (EA = 0)
2. Map the page buffer space by setting FPS = 1
3. Load the DPTR (or /DPTR) with the address to load
4. Load Accumulator register with the data to load
5. Execute the MOVX @DPTR, A instruction (or MOVX @/DPTR, A instruction)
6. If needed loop the steps 3—5 until the page buffer is completely loaded
7. Unmap the page buffer (FPS = 0) and restore interrupts (EA = 1)
1. Load up to one half-page of data in the page buffer from address 0000H to FFFFH
2. Save then disable the interrupts (EA = 0)
3. Launch the programming by writing the data sequence 50H followed by A0H to FCON
4. If launched from internal memory, the CPU idles until programming completes. If
5. Restore the interrupts (EA = 1)
register
launched from external memory, poll the FBUSY flag until it is cleared
Data Memory
00
Low Half Page
00
Page Buffer
3F
40
High Half Page
3F
7F
Figure
3714A–MICRO–7/11
24-3:
Figure