AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 52

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

Table 6-10.
6.10
52
SPIX2
Symbol
CKCON1 = AFH
Not Bit Addressable
Bit
Timer Subclock (AT89L51ID2)
AT89LP51RD2/ED2/ID2 Preliminary
Function
SPI Clock. In Compatibility Mode, clear for one system clock period per peripheral clock cycle and set for two clock
periods per peripheral clock cycle (only valid when X2 = 1). In Fast Mode, clear for one system clock period and set for
TPS+1 clocks per peripheral clock cycle. This bit only affects the generated SCK rate during SPI master mode.
CKCON1
–
7
– Clock Control Register 1
When OSCB of AT89LP51ID2 is enabled and sourced from the low-frequency crystal oscillator,
it can drive the counter input of Timer 0 in place of the T0 pin by setting the SCLKT0 bit in OSC-
CON. The counter input will be toggled at the oscillator frequency divided by 128. For this mode
to function correctly, the timer peripheral clock must be running (not in Power-down) and operat-
ing at a frequency at least twice as high as the subclock as shown in the following equation:
This requirement is due to the fact that the timer must still sample the subclock edges the same
as if were sampling the T0 pin. This feature is not available when OSCB is sourced from either
the external clock on XTAL1B or the internal oscillator.
Pin T2 is also shared with the XTAL1B pin. When OSBC is enabled in the crystal oscillator or
external clock modes, T2 will toggle at the oscillator frequency. Timer 2 can then use the oscilla-
tor as its counter input as well, with no division. For this mode to function correctly, the timer
peripheral clock must be running (not in Power-down) and operating at a frequency at least
twice as high OSCB as shown in the following equation:
–
6
–
5
Timer 2 Subclock:
Timer 0 Subclock:
–
4
–
3
f
TIMER2
f
TIMER0
≥
–
2
f
≥
XTAL1B
f
------------------ -
XTAL1B
64
Reset Value = XXXX XXX0B
×
2
–
1
SPIX2
3714A–MICRO–7/11
0