AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 92

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AT89LP51ED2-20AU

Manufacturer Part Number
AT89LP51ED2-20AU
Description
8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
Manufacturer
Atmel
Datasheet

Specifications of AT89LP51ED2-20AU

Rohs
yes
Core
8051
Processor Series
AT89x
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
64 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Data Rom Size
4 KB
Interface Type
2-Wire, SPI, UART
Number Of Programmable I/os
36
Number Of Timers
3
Program Memory Type
Flash
Factory Pack Quantity
160

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP51ED2-20AU
Manufacturer:
Atmel
Quantity:
10 000
Table 14-4.
14.2
92
T2MOD Address = 0C9H
Not Bit Addressable
Symbol
T2OE
DCEN
Bit
Capture Mode
AT89LP51RD2/ED2/ID2 Preliminary
Function
Timer 2 Output Enable
When T2OE = 1 and C/T2 = 0, the T2 pin will toggle after every Timer 2 overflow.
Timer 2 Down Count Enable
When Timer 2 operates in Auto-Reload mode and EXEN2 = 1, setting DCEN = 1 will cause Timer 2 to count up or down
depending on the state of T2EX.
7
T2MOD – Timer 2 Mode Control Register
In the Capture mode, Timer 2 is a fixed 16-bit timer or counter that counts up from MIN to MAX.
An overflow from MAX to MIN sets bit TF2 in T2CON. If EXEN2 = 1, a 1-to-0 transition at exter-
nal input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and
RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.
The EXF2 and TF2 bits can generate an interrupt. Capture mode is illustrated in
The Timer 2 overflow rate in Capture mode is given by the following equation:
Note:
Figure 14-1. Timer 2 Diagram: Capture Mode
6
T2EX PI N
T2 PI N
In Fast Mode, TPS applies only when the T2X2 bit in CKCON0 is set. TPS always
applies in Compatibility Mode, therefore setting T2X2 in Compatibility Mode will double
the timeout period.
CLK
SYS
5
÷TPS
Capture Mode:
TRANSITION
DETECT OR
4
C/T2 = 0
C/T2 = 1
EXEN2
Time-out Period
3
TR2
CAPTURE
2
RCAP2L
=
TL2
65536
--------------- -
f
SYS
EXF2
Reset Value = 0000 0000B
RCAP2H
TH2
T2OE
×
1
(
TPS
O VERFLO W
+
1
TF2
)
DCEN
0
3714A–MICRO–7/11
Figure
INTERR UPT
TIMER 2
14-1.

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