74ALVCH16373DG-T NXP Semiconductors, 74ALVCH16373DG-T Datasheet - Page 8

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74ALVCH16373DG-T

Manufacturer Part Number
74ALVCH16373DG-T
Description
Latches 3.3V 16-BIT D TRANS LATCH 3-S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74ALVCH16373DG-T

Product Category
Latches
Rohs
yes
Number Of Circuits
2
Logic Type
TTL
Logic Family
ALVC
Polarity
Non-Inverting
Number Of Output Lines
16
High Level Output Current
- 24 mA
Propagation Delay Time
2.1 ns at 3.3 V
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
TSSOP-48
Mounting Style
SMD/SMT
Number Of Input Lines
16
Factory Pack Quantity
2000
Part # Aliases
74ALVCH16373DGG
NXP Semiconductors
Table 6.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
[1]
[2]
10. Dynamic characteristics
Table 7.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit
74ALVCH16373
Product data sheet
Symbol
I
I
I
I
I
C
Symbol
T
t
t
BHL
BHH
BHLO
BHHO
pd
en
amb
I
CC
All typical values are measured at T
Valid for data inputs of bus hold parts only.
= 40 C to +85 C
Parameter
additional supply
current
bus hold LOW current
bus hold HIGH current
bus hold LOW
overdrive current
bus hold HIGH
overdrive current
input capacitance
Static characteristics
Dynamic characteristics
Parameter
propagation delay
enable time
Conditions
nDn to nQn; see
nLE to nQn; see
nOE to nQn; see
…continued
Conditions
V
V
V
V
V
V
V
V
V
V
amb
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
I
CC
CC
CC
CC
CC
CC
CC
CC
CC
per control input
per data I/O input
= V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 25 C.
= 2.7 V to 3.6 V
= 2.3 V; V
= 3.0 V; V
= 2.3 V; V
= 3.0 V; V
= 2.7 V
= 3.6 V
= 2.7 V
= 3.6 V
= 1.2 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.2 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.2 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
CC
All information provided in this document is subject to legal disclaimers.
 0.6 V; I
I
I
I
I
Rev. 6 — 10 July 2012
= 0.7 V
= 0.8 V
= 1.7 V
= 2.0 V
Figure 6
Figure 7
Figure 8
O
= 0 A;
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[3]
[4]
[2]
[3]
[4]
[2]
[3]
[4]
300
450
Min
45
75
300
450
45
75
-
-
-
74ALVCH16373
Min
1.5
1.0
1.0
1.0
1.5
1.0
1.0
1.0
1.5
1.0
1.0
1.0
-
-
-
Typ
175
Figure
Typ
150
150
5.0
5
8.8
3.2
2.1
2.3
2.1
7.4
3.4
2.2
2.2
2.2
8.9
4.0
2.6
2.9
2.3
-
-
-
-
-
-
[1]
[1]
© NXP B.V. 2012. All rights reserved.
10.
Max
5.7
3.9
3.7
3.3
5.9
3.9
3.5
3.2
7.3
5.2
4.9
4.2
Max
500
750
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8 of 18
Unit
A
A
A
A
A
A
A
A
A
A
pF

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