74ALVCH16373DG-T NXP Semiconductors, 74ALVCH16373DG-T Datasheet - Page 9

• Manufacturer Part Number: 74ALVCH16373DG-T
• Description: Latches 3.3V 16-BIT D TRANS LATCH 3-S
• Manufacturer: NXP Semiconductors

Specifications of 74ALVCH16373DG-T

• Product Category: Latches
• Rohs: yes
• Number Of Circuits: 2
• Logic Type: TTL
• Logic Family: ALVC
• Polarity: Non-Inverting
• Number Of Output Lines: 16
• High Level Output Current: - 24 mA
• Propagation Delay Time: 2.1 ns at 3.3 V
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-48
• Mounting Style: SMD/SMT
• Number Of Input Lines: 16
• Factory Pack Quantity: 2000
• Part # Aliases: 74ALVCH16373DGG

NXP Semiconductors
Table 7.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit
[1]
[2]
[3]
[4]
[5]
74ALVCH16373
Product data sheet
Symbol
t
t
t
t
C
dis
W
su
h
PD
All typical values are measured at T
t
t
t
Typical values are measured at V
Typical values are measured at V
C
P
f
C
V
N = number of inputs switching;
(C
pd
en
dis
i
D
CC
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF;
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
 V
PD
Dynamic characteristics
CC
Parameter
disable time
pulse width
set-up time
hold time
power dissipation
capacitance
 V
2
 f
CC
o
2
) = sum of the outputs.
 f
PLH
PZL
PLZ
i
 N + (C
and t
and t
and t
PZH
PHL
PHZ
o
= output frequency in MHz;
L
.
.
.
 V
CC
CC
Conditions
nOE to nQn; see
nLE HIGH; see
nDn to nLE; see
nDn to nLE; see
per flip-flop; V
CC
amb
= 2.5 V.
= 3.3 V.
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
outputs enabled
outputs disabled
2
…continued
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
 f
= 25 C.
= 1.2 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.8 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
o
All information provided in this document is subject to legal disclaimers.
) where:
I
= GND to V
Figure 7
Rev. 6 — 10 July 2012
Figure 9
Figure 9
Figure 8
D
in W).
CC
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
[2]
[3]
[4]
[3]
[4]
[3]
[4]
[3]
[4]
[5]
74ALVCH16373
Min
1.5
1.0
1.0
1.0
3.5
3.0
3.0
2.5
1.0
1.0
1.0
1.0
1.2
1.5
1.5
1.2
-
-
-
Figure
Typ
0.1
0.1
0.1
8.9
3.2
2.2
3.1
2.8
1.0
1.0
1.0
1.0
0.0
0.1
0.2
0.4
0.2
16
10
[1]
© NXP B.V. 2012. All rights reserved.
10.
Max
5.6
4.1
4.7
4.1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
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