CY7C1021D-10ZSXA Cypress Semiconductor, CY7C1021D-10ZSXA Datasheet

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CY7C1021D-10ZSXA

Manufacturer Part Number
CY7C1021D-10ZSXA
Description
SRAM 1-Mbit 64k x16 Static RAM
Manufacturer
Cypress Semiconductor
Datasheet

Specifications of CY7C1021D-10ZSXA

Rohs
yes
Memory Size
1 Mbit
Organization
64 K x 16
Access Time
10 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Current
80 mA
Mounting Style
SMD/SMT
Package / Case
TSOP-44
Memory Type
Asynchronous CMOS
Factory Pack Quantity
135
1-Mbit (64 K × 16) Static RAM
Features
Cypress Semiconductor Corporation
Document Number: 38-05462 Rev. *K
Logic Block Diagram
Temperature Ranges:
Pin and Function Compatible with CY7C1021B
High Speed
Low Active Power
Low CMOS Standby Power
2.0 V Data Retention
Automatic Power Down when Deselected
CMOS for Optimum Speed and Power
Independent Control of Upper and Lower Bits
Available in Pb-free 44-pin 400-Mil Wide Molded SOJ and
44-pin TSOP II Packages
Industrial: –40 °C to 85 °C
Automotive-A: –40 °C to 85 °C
t
I
I
AA
CC
SB2
= 10 ns
= 80 mA at 10 ns
= 3 mA
A
A
A
A
A
A
A
A
4
3
2
1
0
7
6
5
DATA IN DRIVERS
COLUMN DECODER
198 Champion Court
RAM Array
64K x 16
Functional Description
The CY7C1021D is a high performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected. The input and output pins (IO
through IO
device is deselected (CE HIGH), outputs are disabled (OE
HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during
a write operation (CE LOW and WE LOW).
Write to the device by taking Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (IO
specified on the address pins (A
Enable (BHE) is LOW, then data from I/O pins (IO
is written into the location specified on the address pins (A
through A
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on IO
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
complete description of read and write modes.
1-Mbit (64 K × 16) Static RAM
15
15
San Jose
).
) are placed in a high impedance state when the
8
to IO
0
through IO
,
15
CA 95134-1709
. See the
IO
IO
0
8
–IO
–IO
BHE
WE
CE
OE
BLE
7
), is written into the location
Truth Table on page 10
0
7
15
through A
Revised March 6, 2012
CY7C1021D
15
). If Byte High
8
408-943-2600
through IO
0
to IO
for a
7
15
. If
0
0
)

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CY7C1021D-10ZSXA Summary of contents

Page 1

... Document Number: 38-05462 Rev. *K 1-Mbit (64 K × 16) Static RAM Functional Description The CY7C1021D is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. The input and output pins (IO ...

Page 2

... Data Retention Waveform ................................................ 7 Switching Waveforms ...................................................... 7 Document Number: 38-05462 Rev. *K Truth Table ...................................................................... 10 Ordering Information ...................................................... 11 Ordering Code Definitions ......................................... 11 Package Diagrams .......................................................... 12 Acronyms ........................................................................ 14 Document Conventions ................................................. 14 Units of Measure ....................................................... 14 Document History Page ................................................. 15 Sales, Solutions, and Legal Information ...................... 16 Worldwide Sales and Design Support ....................... 16 Products .................................................................... 16 PSoC Solutions ......................................................... 16 CY7C1021D Page ...

Page 3

... Description CY7C1021D [ -10 (Industrial / Automotive- Unit Page ...

Page 4

... RC Max > > < Max > V – 0 > < 0 CY7C1021D ............................ –0 0 Ambient V Speed CC Temperature 5 V  10 -10 (Industrial / Automotive-A) Unit Min Max 2.4 – – 0 0.5 0.8  ...

Page 5

... Rise Time: High-Z characteristics: R1 480 OUTPUT 5 pF 255 INCLUDING JIG AND SCOPE (c) Figure 2 (a). High Z characteristics are tested for all speeds using the test load CY7C1021D Max 8 8 44-pin SOJ 44-pin TSOP II Unit 59.52 53.91 36.75 21.24 [4] ALL INPUT PULSES 90% ...

Page 6

... Document Number: 38-05462 Rev. *K Description values until the first memory access can be performed less than less than t , and t HZCE LZCE HZOE LZOE HZWE Figure 2 on page CY7C1021D -10 (Industrial / Automotive-A) Min Max 100 – 10 – – – – 10 – ...

Page 7

... DATA RETENTION MODE 4.5 V > CDR OHA > 50 s or stable at V > 50  CC(min) CC(min CY7C1021D Min Max 2.0 – – 0.3 V, – – t – [12, 13] DATA VALID Unit Page ...

Page 8

... PU CC SUPPLY CURRENT Notes 14 HIGH for read cycle. 15. Address valid prior to or coincident with CE transition LOW. Document Number: 38-05462 Rev DOE t LZOE t DBE LZBE DATA VALID 50% CY7C1021D [14, 15] t HZOE t HZCE t HZBE HIGH IMPEDANCE 50% I Page ...

Page 9

... Data I/O is high impedance BHE and/or BLE = V 17 goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state. Document Number: 38-05462 Rev. *K [16, 17 SCE PWE PWE t SCE CY7C1021D Page ...

Page 10

... Data In Data In Write – All bits Data In High Z Write – Lower bits only High Z Data In Write – Upper bits only High Z High Z Selected, Outputs Disabled High Z High Z Selected, Outputs Disabled CY7C1021D LZWE Mode Power Standby ( Active ( Active (I ...

Page 11

... Ordering Information Speed Ordering Code (ns) 10 CY7C1021D-10VXI CY7C1021D-10ZSXI CY7C1021D-10ZSXA Shaded areas contain advance information. Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions Document Number: 38-05462 Rev. *K Package Package Type Diagram 51-85082 44-pin (400-Mil) Molded SOJ (Pb-free) ...

Page 12

... Package Diagrams Figure 8. 44-pin SOJ (400 Mils) V44.4 Package Outline, 51-85082 Document Number: 38-05462 Rev. *K CY7C1021D 51-85082 *D Page ...

Page 13

... Package Diagrams (continued) Figure 9. 44-pin TSOP Z44-II Package Outline, 51-85087 Document Number: 38-05462 Rev. *K CY7C1021D 51-85087 *D Page ...

Page 14

... TTL transistor-transistor logic WE write enable Document Number: 38-05462 Rev. *K Document Conventions Units of Measure Symbol Unit of Measure °C degree Celsius MHz megahertz µA microampere µs microsecond mA milliampere mm millimeter ms millisecond ns nanosecond  ohm % percent pF picofarad V volt W watt CY7C1021D Page ...

Page 15

... Automotive-A Range information). Updated Selection Guide Updated Operating Range Updated Electrical Characteristics information). Updated Switching Characteristics information). Updated Ordering Information CY7C1021D-10ZSXA). Updated Package Diagrams. CY7C1021D Description of Change + +1V in footnote # spec from for CC spec from 100 mA to 120 mA for ...

Page 16

... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-05462 Rev. *K All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB Revised March 6, 2012 CY7C1021D PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 ...

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