ST72T331N2T6 STMicroelectronics, ST72T331N2T6 Datasheet - Page 60

• Manufacturer Part Number: ST72T331N2T6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72T331N2T6

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• On-chip Dac: No
• Program Memory Type: EPROM
• Factory Pack Quantity: 90
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.5 V

ST72E331 ST72T331
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
5.5.4 Functional Description
The block diagram of the Serial Control Interface,
is shown in Figure 1.. It contains 6 dedicated reg-
isters:
– Two control registers (CR1 & CR2)
– A status register (SR)
– A baud rate register (BRR)
– An extended prescaler receiver register (ERPR)
– An extended prescaler transmitter register (ETPR)
Refer to the register descriptions in
for the definitions of each bit.
Figure 38. Word length programming
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60
9-bit Word length (M bit is set)
Start
Bit
8-bit Word length (M bit is reset)
Start
Bit
Bit0
Bit0
Bit1
Bit1
Break Frame
Data Frame
Idle Frame
Break Frame
Data Frame
Idle Frame
Bit2
Bit2
Section 0.1.7
Bit3
Bit3
Bit4
Bit4
Bit5
Bit5
5.5.4.1 Serial Data Format
Word length may be selected as being either 8 or 9
bits by programming the M bit in the CR1 register
(see Figure 1.).
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as an entire frame
of “1”s followed by the start bit of the next frame
which contains data.
A Break character is interpreted on receiving “0”s
for some multiple of the frame period. At the end of
the last break frame the transmitter inserts an ex-
tra “1” bit to acknowledge the start bit.
Transmission and reception are driven by their
own baud rate generator.
Bit6
Bit6
Possible
Bit7
Parity
Bit7
Bit
Possible
Parity
Bit8
Bit
Stop
Bit
Stop
Bit
Extra
Start
Next
Start
Bit
Bit
’1’
Extra
Next Data Frame
Next
Start
Start
Bit
Bit
’1’
Start
Bit
Next Data Frame
Start
Bit