MT47H16M16BG-5E:B Micron Technology Inc, MT47H16M16BG-5E:B Datasheet - Page 24

IC DDR2 SDRAM 256MBIT 5NS 84FBGA

MT47H16M16BG-5E:B

Manufacturer Part Number
MT47H16M16BG-5E:B
Description
IC DDR2 SDRAM 256MBIT 5NS 84FBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT47H16M16BG-5E:B

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
256M (16Mx16)
Speed
5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 10: DDR2 I
Notes: 1–7 apply to the entire table
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
Parameter/Condition
Operating one bank active-precharge current:
t
CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are switching; Data bus inputs
are switching
Operating one bank active-read-precharge
current: I
t
t
valid commands; Address bus inputs are switching;
Data pattern is same as I
Precharge power-down current: All banks idle;
t
dress bus inputs are stable; Data bus inputs are float-
ing
Precharge quiet standby current: All banks idle;
t
trol and address bus inputs are stable; Data bus in-
puts are floating
Precharge standby current: All banks idle;
t
trol and address bus inputs are switching; Data bus
inputs are switching
Active power-down current: All banks open;
t
dress bus inputs are stable; Data bus inputs are float-
ing
Active standby current: All banks open;
t
CKE is HIGH, CS# is HIGH between valid commands;
Other control and address bus inputs are switching;
Data bus inputs are switching
Operating burst write current: All banks open;
Continuous burst writes; BL = 4, CL = CL (I
t
CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are switching; Data bus inputs
are switching
Operating burst read current: All banks open; Con-
tinuous burst reads, I
AL = 0;
t
mands; Address bus inputs are switching; Data bus
inputs are switching
CK =
CK =
RCD =
CK =
CK =
CK =
CK =
CK=
CK =
RP (I
DD
t
t
t
t
t
t
t
t
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
t
); CKE is HIGH, CS# is HIGH between valid com-
t
RCD (I
CK =
OUT
DD
DD
DD
DD
DD
DD
DD
DD
),
t
),
),
); CKE is LOW; Other control and ad-
); CKE is HIGH, CS# is HIGH; Other con-
); CKE is HIGH, CS# is HIGH; Other con-
); CKE is LOW; Other control and ad-
),
= 0mA; BL = 4, CL = CL (I
CK (I
DD
t
t
t
RAS =
t
RC =
RC =
RAS =
); CKE is HIGH, CS# is HIGH between
DD
DD
OUT
),
t
t
RC (I
RC (I
t
RAS MAX (I
t
t
Specifications and Conditions
RAS MAX (I
RAS =
DD4W
= 0mA; BL = 4, CL = CL (I
DD
DD
),
),
t
t
t
RAS MAX (I
RAS =
RAS =
DD
DD
),
),
t
t
DD
RAS MIN (I
RAS MIN (I
t
t
RP =
RP =
), AL = 0;
DD
DD
t
), AL = 0;
RP (I
t
),
RP (I
t
RP =
DD
DD
DD
DD
DD
);
),
);
),
);
Symbol
I
I
I
I
I
I
I
I
DD3Pf
DD3Ps
DD4W
I
I
DD2Q
DD2N
DD3N
DD2P
DD4R
DD0
DD1
24
Electrical Specifications – I
Configuration
Slow PDN exit
Fast PDN exit
x4, x8, x16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
MR12 = 0
MR12 = 1
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x16
x16
x16
x16
x16
x16
x16
256Mb: x4, x8, x16 DDR2 SDRAM
100
100
190
215
180
190
90
90
40
50
40
40
30
50
55
-3
5
6
©2003 Micron Technology, Inc. All rights reserved.
-37E
160
180
150
160
80
80
90
90
35
35
35
35
25
40
40
5
6
DD
Parameters
125
140
115
120
-5E
75
75
85
85
25
25
30
30
20
30
30
5
6
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA

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