AT45DB041B-RI Atmel, AT45DB041B-RI Datasheet - Page 8

• Manufacturer Part Number: AT45DB041B-RI
• Description: IC FLASH 4MBIT 20MHZ 28SOIC
• Manufacturer: Atmel

Specifications of AT45DB041B-RI

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 4M (2048 pages x 264 bytes)
• Speed: 20MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.2.6
5.3
5.3.1
5.3.2
5.3.3
8
Additional Commands
AT45DB041B
Main Memory Page Program Through Buffer
Main Memory Page to Buffer Transfer
Main Memory Page to Buffer Compare
Auto Page Rewrite
This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program
with Built-in Erase operations. Data is first shifted into buffer 1 or buffer 2 from the SI pin and
then programmed into a specified page in the main memory. To initiate the operation, an 8-bit
opcode, 82H for buffer 1 or 85H for buffer 2, must be followed by the four reserved bits and 20
address bits. The 11 most significant address bits (PA10 - PA0) select the page in the main
memory where data is to be written, and the next nine address bits (BFA8 - BFA0) select the first
byte in the buffer to be written. After all address bits are shifted in, the part will take data from the
SI pin and store it in one of the data buffers. If the end of the buffer is reached, the device will
wrap around back to the beginning of the buffer. When there is a low-to-high transition on the CS
pin, the part will first erase the selected page in main memory to all 1s and then program the
data stored in the buffer into the specified page in the main memory. Both the erase and the pro-
gramming of the page are internally self-timed and should take place in a maximum of time t
During this time, the status register will indicate that the part is busy.
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation, an 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by the
four reserved bits, 11 address bits (PA10 - PA0) which specify the page in main memory that is
to be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the
page of data from the main memory to the buffer will begin when the CS pin transitions from a
low to a high state. During the transfer of a page of data (t
determine whether the transfer has been completed or not.
A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate
the operation, an 8-bit opcode, 60H for buffer 1 and 61H for buffer 2, must be followed by 24
address bits consisting of the four reserved bits, 11 address bits (PA10 - PA0) which specify the
page in the main memory that is to be compared to the buffer, and nine don’t care bits. The CS
pin must be low while toggling the SCK pin to load the opcode, the address bits, and the don’t
care bits from the SI pin. On the low-to-high transition of the CS pin, the 264 bytes in the
selected main memory page will be compared with the 264 bytes in buffer 1 or buffer 2. During
this time (t
pare operation, bit 6 of the status register is updated with the result of the compare.
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in
a random fashion. This mode is a combination of two operations: Main Memory Page to Buffer
Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of data is first
transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1
or buffer 2) is programmed back into its original page of main memory. To start the rewrite oper-
ation, an 8-bit opcode, 58H for buffer 1 or 59H for buffer 2, must be followed by the four reserved
bits, 11 address bits (PA10 - PA0) that specify the page in main memory to be rewritten, and
nine additional don’t care bits. When a low-to-high transition occurs on the CS pin, the part will
first transfer data from the page in main memory to a buffer and then program the data from the
buffer back into same page of main memory. The operation is internally self-timed and should
XFR
), the status register will indicate that the part is busy. On completion of the com-
XFR
), the status register can be read to
3443D–DFLSH–2/08
EP
.