MT45W1MW16PDGA-70 WT TR Micron Technology Inc, MT45W1MW16PDGA-70 WT TR Datasheet - Page 7

• Manufacturer Part Number: MT45W1MW16PDGA-70 WT TR
• Description: IC PSRAM 16MBIT 70NS 48VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT45W1MW16PDGA-70 WT TR

• Format - Memory: RAM
• Memory Type: PSRAM (Page)
• Memory Size: 16M (1M x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 48-VFBGA
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1275-2; MT45W1MW16PDGA-70 WT TR

Bus Operations
Table 2:
PDF: 09005aef81cadc83/Source:09005aef81c6edb4
16mb_asyncpage_cr1_0_p23z_2.fm - Rev. F 4/08 EN
Mode
Standby
Read
Write
No operation
PAR
DPD
Load
configuration
register
Bus Operations
Partial-array refresh
Deep power-down
Notes: 1. When LB# and UB# are in select mode (LOW), DQ[15:0] are affected. When LB# alone is in
Standby
Power
Active
Active
Active
Idle
2. When the device is in standby mode, control inputs (WE#, OE#), address inputs, and data
3. When WE# is active, the OE# input is internally disabled and has no effect on the I/Os.
4. The device will consume active power in this mode whenever addresses are changed.
5. V
6. DPD is enabled when configuration register bit CR[4] is “0”; otherwise, PAR is enabled.
select mode, only DQ[7:0] are affected. When UB# alone is in the select mode, only
DQ[15:8] are affected.
inputs/outputs are internally isolated from any external influence.
standby current.
IN
= V
CC
Q or 0V; all device balls must be static (unswitched) in order to achieve minimum
CE#
H
H
H
L
L
L
L
16Mb: 1 Meg x 16 Async/Page CellularRAM 1.0 Memory
WE#
H
X
X
X
X
L
L
7
OE#
X
X
X
X
X
X
L
LB#/UB#
Micron Technology, Inc., reserves the right to change products or specifications without notice.
X
X
X
X
X
L
L
ZZ#
H
H
H
H
L
L
L
©2005 Micron Technology, Inc. All rights reserved.
DQ[15:0]
Data-out
Data-in
High-Z
High-Z
High-Z
High-Z
X
Bus Operations
1
Notes
1, 3, 4
2, 5
1, 4
4, 5
6
6