PSD834F2-90M STMicroelectronics, PSD834F2-90M Datasheet - Page 6

• Manufacturer Part Number: PSD834F2-90M
• Description: IC FLASH 2MBIT 90NS 52QFP
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-90M

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 52-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2008

PSD813F2V, PSD854F2V
SUMMARY DESCRIPTION
The PSD8XXFX family of memory systems for mi-
crocontrollers (MCUs) brings In-System-Program-
mability (ISP) to Flash memory and programmable
logic. The result is a simple and flexible solution for
embedded designs. PSD devices combine many
of the peripheral functions found in MCU based
applications.
Table
PSD834F2, PSD853F2, PSD854F2.
The CPLD in the PSD devices features an opti-
mized macrocell logic architecture. The PSD mac-
rocell was created to address the unique
requirements of embedded system designs. It al-
lows direct connection between the system ad-
dress/data bus, and the internal PSD registers, to
simplify communication between the MCU and
other supporting devices.
The PSD device includes a JTAG Serial Program-
ming interface, to allow In-System Programming
(ISP) of the entire device. This feature reduces de-
velopment time, simplifies the manufacturing flow,
and dramatically lowers the cost of field upgrades.
Using ST’s special Fast-JTAG programming, a de-
sign can be rapidly programmed into the PSD in as
little as seven seconds.
Table 1. Product Range
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
6/109
PSD813F2V
PSD854F2V
Part Number
Unit (PMU), Automatic Power-down (APD).
1
summarizes all the devices in the
(1)
Primary Flash
(8 Sectors)
Memory
1 Mbit
2 Mbit
Flash Memory
Secondary
4 Sectors)
256 Kbit
256 Kbit
Doc ID 10552 Rev 3
256 Kbit
16 Kbit
SRAM
The innovative PSD8XXFX family solves key
problems faced by designers when managing dis-
crete Flash memory devices, such as:
–
–
–
The JTAG Serial Interface block allows In-System
Programming (ISP), and eliminates the need for
an external Boot EPROM, or an external program-
mer. To simplify Flash memory updates, program
execution is performed from a secondary Flash
memory while the primary Flash memory is being
updated. This solution avoids the complicated
hardware and software overhead necessary to im-
plement IAP.
ST makes available a software development tool,
PSDsoft Express, that generates ANSI-C compli-
ant code for use with your target MCU. This code
allows you to manipulate the non-volatile memory
(NVM) within the PSD. Code examples are also
provided for:
–
–
–
I/O Ports
First-time In-System Programming (ISP)
Complex address decoding
Simultaneous read and write to the device.
Flash memory IAP via the UART of the host
MCU
Memory paging to execute code across
several PSD memory pages
Loading, reading, and manipulation of PSD
macrocells by the MCU.
27
27
Input
24
24
Macrocells
Number of
Output
16
16
ISC Port
Serial
JTAG/
ISP
yes
yes
Turbo
Mode
yes
yes