MD2533-D8G-X-P SanDisk, MD2533-D8G-X-P Datasheet - Page 15

• Manufacturer Part Number: MD2533-D8G-X-P
• Description: IC MDOC H3 8GB FBGA
• Manufacturer: SanDisk

Specifications of MD2533-D8G-X-P

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 8G (1G x 8)
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 1.95 V, 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 115-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

2.2.2
mDOC H3 9x12mm and 12x18mm (115 ball) package ball designations are listed in the signal
descriptions, presented in logic groups, in Table 1.
WARM_RST#
15
GPIO_TIMER
A[16:15]
A[14:13]
A[12:11]
D[15:14]
D[13:12]
RSTIN#
LOCK#
BUSY#
A[10:8]
D[11:8]
Signal
A[7:4]
A[3:0]
D[7:6]
D[5:3]
D[2:0]
WE#
OE#
CE#
ID0
9x12/12x18 FBGA Signal Description
D3, E3, F3,
G7, F7, D7
L4, H4, K3
L5, K4, J4,
L7, J6, J5
F10, E10
Ball No.
E2, F2,
G2, H2
E8, D8
K8, H7
E4, F4
J7, K7
J8, L8
G3
G8
D6
E5
L3
E1
F8
F5
J2
J3
J9
CMOS 3-STATE Busy. Active low. Indicates that mDOC is
A[16:13]IN/PD
Table 1: Standard Interface Signal Description
Signal Type
A[12:0] ST
ST/PU
ST/PU
ST/PU
PD
ST
ST
ST
ST
ST
ST
Data Sheet (Preliminary) Rev. 0.2
1
System Interface
Configuration
Address bus.
Data bus, low byte.
Data bus, high byte.
Chip Enable, active low.
Output Enable, active low.
Write Enable, active low
Identification. Configuration control to support
up to two chips cascaded in the same
memory window.
Chip 1: ID0 = VSS
Chip 2: ID0 = VCCQ
Lock, active low. When active, provides full
hardware data protection of selected
partitions.
Warm reset input, used for triggering device
warm-reset. Active low. If not used may be
left floating.
initializing and should not be accessed
GPIO or configurable timer.
Reset, active low.
Control
Description
mDOC H3 Embedded Flash Drive
92-DS-1205-10
Input/output
Input/output
Input/output
Direction
Signal
Output
Input
Input
Input
Input
Input
Input
Input
input