ISL6256AHAZ Intersil, ISL6256AHAZ Datasheet - Page 20

• Manufacturer Part Number: ISL6256AHAZ
• Description: IC BATTERY CHARGER CTRLR 28-QSOP
• Manufacturer: Intersil

Specifications of ISL6256AHAZ

• Function: Charge Management
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 7 V ~ 25 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.150", 3.95mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LOOP COMPENSATION DESIGN
ISL6256 has three closed loop control modes. One controls
the output voltage when the battery is fully charged or
absent. A second controls the current into the battery when
charging and the third limits current drawn from the adapter.
The charge current and input current control loops are
compensated by a single capacitor on the ICOMP pin. The
voltage control loop is compensated by a network on the
VCOMP pin. Descriptions of these control loops and
guidelines for selecting compensation components will be
given in the following sections. Which loop controls the
output is determined by the minimum current buffer and the
minimum voltage buffer shown in Figure 1 on page 3. These
three loops will be described separately.
TRANSCONDUCTANCE AMPLIFIERS GM1, GM2 AND
GM3
The ISL6256 uses several transconductance amplifiers (also
known as gm amps). Most commercially available op amps
are voltage controlled voltage sources with gain expressed
as A = V
controlled current sources with gain expressed as
gm = I
some of the equations for poles and zeros in the
compensation.
PWM GAIN F
The Pulse Width Modulator in the ISL6256 converts voltage
at VCOMP to a duty cycle by comparing VCOMP to a
triangle wave (duty = VCOMP/V
filter formed by L and C
output voltage (Vo = V
wave amplitude is proportional to V
amplitude proportional to DCIN makes the gain from
VCOMP to the PHASE output a constant 11 and is
independent of DCIN. For small signal AC analysis, the
battery is modeled by it’s internal resistance. The total output
R
PARTS
8
R
R
R
R
R
R
R
R
R
R
R
, R
10
12
13
OUT
1
2
3
4
5
6
7
9
11
OUT
TABLE 2. COMPONENT LIST (Continued)
/V
IN
/V
40mΩ, ±1%, LRC-LR2512-01-R040-F, IRC
20mΩ, ±1%, LRC-LR2010-01-R020-F, IRC
18Ω, ±5%, (0805)
2.2Ω, ±5%, (0805)
100kΩ, ±5%, (0805)
4.7k, ±5%, (0805)
100Ω, ±5%, (0805)
130k, ±1%, (0805)
10.2kΩ, ±1%, (0805)
4.7Ω, ±5%, (0805)
20kΩ, ±1%, (0805)
1.87kΩ, ±1%, (0805)
M
. Transconductance gain (gm) will appear in
IN
. Transconductance amps are voltage
PART NUMBERS AND MANUFACTURER
DCIN
O
convert the duty cycle to a DC
*duty). In ISL6256, the triangle
20
P-P RAMP
DCIN
. Making the ramp
). The low-pass
ISL6256, ISL6256A
resistance is the sum of the sense resistor and the internal
resistance of the MOSFETs, inductor and capacitor.
Figure 18 shows the small signal model of the pulse width
modulator (PWM), power stage, output filter and battery.
In most cases the Battery resistance is very small (<200mΩ)
resulting in a very low Q in the output filter. This results in a
frequency response from the input of the PWM to the
inductor current with a single pole at the frequency
calculated in Equation 31:
The output capacitor creates a pole at a very high frequency
due to the small resistance in parallel with it. The frequency
of this pole is calculated in Equation 32:
Charge Current Control Loop
When the battery voltage is less than the fully charged
voltage, the voltage error amplifier goes to it’s maximum
output (limited to 1.2V above ICOMP) and the ICOMP
voltage controls the loop through the minimum voltage
buffer. Figure 19 shows the charge current control loop.
f
f
POLE2
POLE1
V
INPUT
GAIN = 11
PWM
RAMP
PWM
RAMP GEN
INPUT
PWM
=
=
= VDD/11
11
-------------------------------------- -
2π C
(
------------------------------------------------------------------------------------------------------ -
FIGURE 18. SMALL SIGNAL AC MODEL
R
SENSE
⋅
R FET_r
+
-
o
1
⋅
R
BAT
+
DS(ON)
r
DS ON
(
2π L
L
⋅
)
+
R
VDD
R
DCR
L_DCR
+
R
R
BAT
L
R
SENSE
ESR
CO
)
CO
September 14, 2010
(EQ. 31)
(EQ. 32)
FN6499.3
R
BAT