HIP4086ABZT Intersil, HIP4086ABZT Datasheet - Page 3

• Manufacturer Part Number: HIP4086ABZT
• Description: IC DRIVER 3PHASE 80V 0.5A 24SOIC
• Manufacturer: Intersil

Specifications of HIP4086ABZT

• Configuration: 3 Phase Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 65ns
• Current - Peak: 500mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 95V
• Voltage - Supply: 7 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: HIP4086ABZTTR

Pin Descriptions
NOTE: x = A, B and C.
NUMBER
PIN
16
13
12
11
10
17
24
14
15
23
15
20
21
22
19
1
5
2
4
3
6
7
8
9
SYMBOL
RDEL
UVLO
RFSH
(xHO)
(xHB)
(xHS)
(xLO)
CHO
AHB
BHB
CHB
(xHI)
AHO
BHO
AHS
BHS
CHS
CLO
(xLI)
V
ALO
BLO
V
AHI
BHI
CHI
DIS
ALI
BLI
CLI
DD
SS
3
High-Side Bootstrap supplies. One external bootstrap diode and one capacitor are required for each. Connect
cathode of bootstrap diode and positive side of bootstrap capacitor to each xHB pin.
High-Side Logic Level Inputs. Logic at these three pins controls the three high side output drivers, AHO (Pin
17), BHO (Pin 24) and CHO (Pin 14). When xHI is low, xHO is high. When xHI is high, xHO is low. Unless the
dead time is disabled by connecting RDEL (Pin 7) to ground, the low side input of each phase will override the
corresponding high side input on that phase - see Truth Table on previous page. If RDEL is tied to ground,
dead time is disabled and the outputs follow the inputs. Care must be taken to avoid shoot-through in this
application. DIS (Pin 10) also overrides the high side inputs. xHI can be driven by signal levels of 0V to 15V
(no greater than V
Low-Side Logic Level Inputs. Logic at these three pins controls the three low side output drivers ALO (Pin 21),
BLO (Pin 22) and CLO (Pin 19). If the upper inputs are grounded then the lower inputs control both xLO and
xHO drivers, with the dead time set by the resistor at RDEL (Pin 7). DIS (Pin 10) high level input overrides xLI,
forcing all outputs low. xLI can be driven by signal levels of 0V to 15V (no greater than V
Ground. Connect the sources of the Low-Side power MOSFETs to this pin.
Dead Time Setting. Connect a resistor from this pin to V
between drivers - see Figure 15. All drivers turn-off with no adjustable delay, so the RDEL resistor guarantees
no shoot-through by delaying the turn-on of all drivers. When RDEL is tied to V
be commanded on simultaneously. While not necessary in most applications, a decoupling capacitor of 0.1µF
or smaller may be connected between RDEL and V
Undervoltage Setting. A resistor can be connected between this pin and V
point, see Figure 16. With this pin not connected, the undervoltage disable is typically 6.6V. When this pin is
tied to V
Refresh Pulse Setting. An external capacitor can be connected from this pin to V
the start up refresh pulse - see Figure 14. If this pin is not connected, the refresh pulse is typically 1.5µs.
Disable Input. Logic level input that when taken high sets all six outputs low. DIS high overrides all other inputs.
With DIS low, the outputs are controlled by the other inputs. DIS can be driven by signal levels of 0V to 15V
(no greater than V
High-Side Outputs. Connect to the gates of the High-Side power MOSFETs in each phase.
High-Side Source Connection. Connect the sources of the High-Side power MOSFETs to these pins. The
negative side of the bootstrap capacitors should also be connected to these pins.
Positive Supply. Decouple this pin to V
Low-Side Outputs. Connect the gates of the Low-Side power MOSFETs to these pins.
DD
, the undervoltage disable is typically 6.2V.
DD
DD
).
).
HIP4086
SS
(Pin 6).
DESCRIPTION
SS
.
DD
to set timing current that defines the dead time
SS
to program the undervoltage set
SS
, both upper and lowers can
SS
to increase the length of
DD
).