IC DRIVER FULL-BRIDGE 20-DIP

HIP4080AIP

Manufacturer Part NumberHIP4080AIP
DescriptionIC DRIVER FULL-BRIDGE 20-DIP
ManufacturerIntersil
HIP4080AIP datasheet
 

Specifications of HIP4080AIP

ConfigurationH BridgeInput TypeNon-Inverting
Delay Time70nsCurrent - Peak2.6A
Number Of Configurations1Number Of Outputs4
High Side Voltage - Max (bootstrap)95VVoltage - Supply9.5 V ~ 15 V
Operating Temperature-40°C ~ 85°CMounting TypeThrough Hole
Package / Case20-DIP (0.300", 7.62mm)Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Data Sheet
80V/2.5A Peak, High Frequency Full Bridge
FET Driver
The HIP4080A is a high frequency, medium voltage Full
Bridge N-Channel FET driver IC, available in 20 lead plastic
SOIC and DIP packages. The HIP4080A includes an input
comparator, used to facilitate the “hysteresis” and PWM
modes of operation. Its HEN (high enable) lead can force
current to freewheel in the bottom two external power
MOSFETs, maintaining the upper power MOSFETs off.
Since it can switch at frequencies up to 1MHz, the HIP4080A
is well suited for driving Voice Coil Motors, switching power
amplifiers and power supplies.
HIP4080A can also drive medium voltage brush motors, and
two HIP4080As can be used to drive high performance
stepper motors, since the short minimum “on-time” can
provide fine micro-stepping capability.
Short propagation delays of approximately 55ns maximize
control loop crossover frequencies and dead-times which
can be adjusted to near zero to minimize distortion, resulting
in precise control of the driven load.
The similar HIP4081A IC allows independent control of all 4
FETs in a Full Bridge configuration.
The Application Note for the HIP4080A is AN9404.
Ordering Information
PART
TEMPERATURE
NUMBER
RANGE (°C)
PACKAGE
HIP4080AIPZ
-40 to +85
20 Ld PDIP
(Note 1)
(Pb-Free)
HIP4080AIP
-40 to +85
20 Ld PDIP
HIP4080AIB
-40 to +85
20 Ld SOIC
HIP4080AIBZ
-40 to +85
20 Ld SOIC
(Note 1)
(Pb-Free)
NOTES:
1. Intersil Pb-Free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-Free products are MSL
classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
2. Add “T” suffix for Tape and Reel packing option. HIP4080AIP not
available in Tape and Reel.
1
July 2004
Features
• Drives N-Channel FET Full Bridge Including High Side
Chop Capability
• Bootstrap Supply Max Voltage to 95VDC
• Drives 1000pF Load at 1MHz in Free Air at +50°C with
Rise and Fall Times of Typically 10ns
• User-Programmable Dead Time
• Charge-Pump and Bootstrap Maintain Upper Bias
Supplies
• DIS (Disable) Pin Pulls Gates Low
• Input Logic Thresholds Compatible with 5V to 15V Logic
Levels
• Very Low Power Consumption
• Undervoltage Protection
• Pb-Free Available as an Option
Applications
• Medium/Large Voice Coil Motors
• Full Bridge Power Supplies
• Switching Power Amplifiers
• High Performance Motor Controls
• Noise Cancellation Systems
PKG.
• Battery Powered Vehicles
DWG. #
• Peripherals
E20.3
• U.P.S.
E20.3
Pinout
M20.3
M20.3
BHB
HEN
DIS
V
SS
OUT
IN+
IN-
HDEL
LDEL
AHB
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1995, Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HIP4080A
FN3658.7
HIP4080A
(PDIP, SOIC)
TOP VIEW
1
20
BHO
2
BHS
19
3
18
BLO
4
17
BLS
V
5
16
DD
V
6
15
CC
ALS
7
14
ALO
8
13
AHS
9
12
AHO
10
11

HIP4080AIP Summary of contents

  • Page 1

    ... SnPb and Pb-free soldering operations. Intersil Pb-Free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. 2. Add “T” suffix for Tape and Reel packing option. HIP4080AIP not available in Tape and Reel. 1 July 2004 Features • ...

  • Page 2

    Application Block Diagram 12V HEN DIS HIP4080A IN+ IN- GND Functional Block Diagram UNDER- CHARGE VOLTAGE PUMP HEN DIS 3 5 OUT 6 IN HDEL 9 LDEL ...

  • Page 3

    Typical Application (Hysteresis Mode Switching) 1 BHB 12V 2 HEN DIS 3 DIS OUT IN IN HDEL LDEL 9 AHB 10 GND 3 HIP4080A 20 BHO 19 BHS 18 BLO 17 BLS ...

  • Page 4

    Absolute Maximum Ratings Supply Voltage, V and -0.3V to 16V DD CC Logic I/O Voltages . . . . ...

  • Page 5

    Electrical Specifications +25°C, Unless Otherwise Specified (Continued) A PARAMETERS Voltage Gain OUT High Level Output Voltage OUT Low Level Output Voltage Low Level Output Current High Level Output Current INPUT PINS: DIS Low Level ...

  • Page 6

    Switching Specifications 1000pF, and T L PARAMETERS Lower Turn-off Propagation Delay (IN+/IN- to ALO/BLO) Upper Turn-off Propagation Delay (IN+/IN- to AHO/BHO) Lower Turn-on Propagation Delay (IN+/IN- to ALO/BLO) Upper Turn-on Propagation Delay (IN+/IN- to ...

  • Page 7

    Pin Descriptions PIN NUMBER SYMBOL 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this ...

  • Page 8

    Timing Diagrams T HPHL U/V = DIS 0 1 HEN IN+ > IN- ALO AHO BLO BHO T LPHL T HEN-PHL U/V = DIS 0 HEN IN+ > IN- ALO AHO BLO BHO T DLPLH U/V or DIS HEN IN+ ...

  • Page 9

    Typical Performance Curves 14.0 12.0 10.0 8.0 6.0 4.0 2 SUPPLY VOLTAGE (V) DD FIGURE 4. QUIESCENT I SUPPLY CURRENT SUPPLY VOLTAGE 20.0 15.0 10.0 5.0 0.0 0 100 200 300 400 500 ...

  • Page 10

    Typical Performance Curves -90 -100 -110 -120 -50 - JUNCTION TEMPERATURE (°C) FIGURE 10. DIS LOW LEVEL INPUT CURRENT I TEMPERATURE 15.0 14.0 13.0 12.0 11.0 10.0 -40 - JUNCTION TEMPERATURE (°C) FIGURE 12. ...

  • Page 11

    Typical Performance Curves 450 425 400 375 350 -50 - JUNCTION TEMPERATURE (°C) FIGURE 16. T REFRESH PULSE WIDTH vs REF-PW TEMPERATURE 90.0 80.0 70.0 60.0 50.0 40.0 -40 - JUNCTION TEMPERATURE (°C) FIGURE ...

  • Page 12

    Typical Performance Curves 13.5 12.5 11.5 10.5 9.5 8.5 -40 - JUNCTION TEMPERATURE (°C) FIGURE 22. GATE DRIVE FALL TIME T 6.0 5.5 5.0 4.5 4.0 -40 - JUNCTION TEMPERATURE (°C) FIGURE 24. V ...

  • Page 13

    Typical Performance Curves 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 ABH FIGURE 28. PEAK PULLUP CURRENT I VOLTAGE 1000 500 200 100 50 20 ...

  • Page 14

    IN2 IN1 +12V CONTROL LOGIC SECTION R29 JMPR1 1 2 OUT/BLI U2 CD4069UB JMPR2 12 IN+/ALI 13 U2 CD4069UB JMPR3 5 6 HEN/BHI U2 CD4069UB R33 3 JMPR4 11 10 IN-/AHI CD4069UB FIGURE 33. HIP4080A EVALUATION ...

  • Page 15

    GND +12V CR2 + + C4 R22 U1 BHO R24 DIS BLO U2 BLS IN1 JMPR1 I JMPR2 O ALS R23 JMPR3 ALO IN2 JMPR4 R21 AHO O LDEL C3 ALS CR1 R33 R34 BLS FIGURE 33. HIP4080A EVALUATION BOARD ...

  • Page 16

    Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...

  • Page 17

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...