IRS26302DJPBF International Rectifier, IRS26302DJPBF Datasheet - Page 18

IC BRIDGE +1 GATE DVR 3PH 44PLCC

IRS26302DJPBF

Manufacturer Part Number
IRS26302DJPBF
Description
IC BRIDGE +1 GATE DVR 3PH 44PLCC
Manufacturer
International Rectifier
Datasheet

Specifications of IRS26302DJPBF

Configuration
3 Phase Bridge
Input Type
Non-Inverting
Delay Time
320ns
Current - Peak
200mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
44-PLCC (32 Leads)
Number Of Drivers
6
Driver Configuration
Non-Inverting
Driver Type
High and Low Side
Input Logic Level
CMOS/TTL
Rise Time
190ns
Fall Time
75ns
Propagation Delay Time
710ns
Peak Output Current
350mA
Power Dissipation
4.6W
Operating Supply Voltage (min)
10V
Turn Off Delay Time
50ns
Turn On Delay Time (max)
50ns
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
32
Package Type
PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRS26302DJPBF
Manufacturer:
International Rectifier
Quantity:
10 000
IRS26302DJ
Figure 4: Input/output timing diagram
Figure 5: Detailed view of B & C intervals
Deadtime
This family of HVICs features integrated deadtime protection circuitry. The deadtime for these ICs is fixed; other ICs
within IR’s HVIC portfolio feature programmable deadtime for greater design flexibility. The deadtime feature inserts
a time period (a minimum deadtime) in which both the high- and low-side power switches are held off; this is done to
ensure that the power switch being turned off has fully turned off before the second power switch is turned on. This
minimum deadtime is automatically inserter whenever the external deadtime is shorter than DT; external deadtimes
larger than DT are not modified by the gate driver. Figure 7 illustrates the deadtime period and the relationship
between the output gate signals.
The deadtime circuitry of the IRS26302DJ is matched with respect to the high- and low-side outputs of a given
channel; additionally, the deadtimes of each of the three channels are matched. Figure 7 defines the two deadtime
parameters (i.e., DT
and DT
) of a specific channel; the deadtime matching parameter (MDT) associated with the
1
2
IRS26302DJ specifies the maximum difference between DT
and DT
. The MDT parameter also applies when
1
2
comparing the DT of one channel of the IRS26302DJ to that of another.
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18

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