IRS2330DJPBF International Rectifier, IRS2330DJPBF Datasheet - Page 20

• Manufacturer Part Number: IRS2330DJPBF
• Description: IC DVR 3-PHASE BRIDGE PLCC44
• Manufacturer: International Rectifier

Specifications of IRS2330DJPBF

• Configuration: 3 Phase Bridge
• Input Type: Inverting
• Delay Time: 500ns
• Current - Peak: 250mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 10 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Also when the V phase current flows from the inductive load back to the inverter (see Figures 23 and 24), and Q4 IGBT
switches on, the current commutation occurs from D3 to Q4. At the same instance, the voltage node, V
positive DC bus voltage to the negative DC bus voltage.
However, in a real inverter circuit, the V
below the level of the negative DC bus. This undershoot voltage is called “negative V
The circuit shown in Figure 25 depicts one leg of the three phase inverter; Figures 26 and 27 show a simplified illustration of
the commutation of the current between Q1 and D2. The parasitic inductances in the power circuit from the die bonding to the
PCB tracks are lumped together in L
by the voltage drops associated with the power switch and the parasitic elements of the circuit. When the high-side power
switch turns off, the load current momentarily flows in the low-side freewheeling diode due to the inductive load connected to
V
HVIC) to the load and a negative voltage between V
potential than the V
S1
(the load is not shown in these figures). This current flows from the DC- bus (which is connected to the VSO pin of the
www.irf.com
Figure 21: Q1 conducting
Figure 23: D3 conducting
S
pin).
OFF
ON
Q1
Q2
DC+ BUS
DC- BUS
V
S1
D2
I
U
C
and L
S
voltage swing does not stop at the level of the negative DC bus, rather it swings
E
for each IGBT. When the high-side switch is on, V
S1
and the DC- Bus is induced (i.e., the VSO pin of the HVIC is at a higher
Figure 22: D2 conducting
Figure 24: Q4 conducting
S
transient”.
OFF
OFF
OFF
IRS233(0,2)(D)(S&J)PbF
ON
Q1
Q2
Q3
Q4
DC+ BUS
DC+ BUS
V
DC- BUS
V
DC- BUS
S1
S2
D1
D2
D3
S1
I
is below the DC+ voltage
U
I
V
S2
, swings from the
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