PX3511BDAG Intersil, PX3511BDAG Datasheet

PX3511BDAG

Manufacturer Part Number

PX3511BDAG

Description

IC DRVR SYNC BUCK HF 8-SOIC

Manufacturer

Intersil

Datasheet

1.PX3511ADAG.pdf (10 pages)

Specifications of PX3511BDAG

Configuration

High and Low Side, Synchronous

Input Type

PWM

Delay Time

10.0ns

Current - Peak

1.25A

Number Of Configurations

Number Of Outputs

High Side Voltage - Max (bootstrap)

36V

Voltage - Supply

10.8 V ~ 13.2 V

Operating Temperature

0°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

8-SOIC (3.9mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Advanced Synchronous Rectified Buck

MOSFET Drivers with Protection Features

The PX3511A and PX3511B are high frequency MOSFET

drivers specifically designed to drive upper and lower power

N-Channel MOSFETs in a synchronous rectified buck

converter topology. These drivers combined with the

ISL6595 Digital Multi-Phase Buck PWM controller and

N-Channel MOSFETs form a complete core-voltage

regulator solution for advanced microprocessors.

The PX3511A drives the upper gate to 12V, while the lower

gate can be independently driven over a range from 5V to

12V. The PX3511B drives both upper and lower gates over a

range of 5V to 12V. This drive-voltage provides the flexibility

necessary to optimize applications involving trade-offs

between gate charge and conduction losses.

An adaptive zero shoot-through protection is integrated to

prevent both the upper and lower MOSFETs from conducting

simultaneously and to minimize the dead time. These

products add an overvoltage protection feature operational

before VCC exceeds its turn-on threshold, at which the

PHASE node is connected to the gate of the low side

MOSFET (LGATE). The output voltage of the converter is

then limited by the threshold of the low side MOSFET, which

provides some protection to the microprocessor if the upper

MOSFET(s) is shorted during initial start-up.

These drivers also feature a three-state PWM input which,

working together with Intersil’s multi-phase PWM controllers,

prevents a negative transient on the output voltage when the

output is shut down. This feature eliminates the Schottky

diode that is used in some systems for protecting the load

from reversed output voltage events.

Data Sheet

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Dual MOSFET Drives for Synchronous Rectified Bridge

• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency

• 36V Internal Bootstrap Schottky Diode

• Bootstrap Capacitor Overcharging Prevention

• Supports High Switching Frequency (up to 2MHz)

• Three-State PWM Input for Output Stage Shutdown

• Three-State PWM Input Hysteresis for Applications With

• Pre-POR Overvoltage Protection

• VCC Undervoltage Protection

• Expandable Bottom Copper Pad for Enhanced Heat

• Dual Flat No-Lead (DFN) Package

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Core Regulators for Intel® and AMD® Microprocessors

• High Current DC/DC Converters

• High Frequency and High Efficiency VRM and VRD

Related Literature

• Technical Brief TB363 “Guidelines for Handling and

• Technical Brief TB417 for Power Train Design, Layout

- 3A Sinking Current Capability

- Fast Rise/Fall Times and Low Propagation Delays

Power Sequencing Requirement

Sinking

- Near Chip-Scale Package Footprint; Improves PCB

Processing Moisture Sensitive Surface Mount Devices

(SMDs)”

Guidelines, and Feedback Compensation Design

February 26, 2007

Efficiency and Thinner in Profile

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

PX3511A, PX3511B

FN6462.0

Related parts for PX3511BDAG

PX3511BDAG Summary of contents

Page 1

... Guidelines, and Feedback Compensation Design CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. FN6462.0 ...

Page 2

... PX3511 ADAG PX3511ADDG 11AD PX3511ADDG-RA 11AD PX3511BDAG (Note) PX351 BDAG PX3511BDAG-R3 (Note) PX3511 BDAG PX3511BDDG 11BD PX3511BDDG-RA 11BD NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...

Page 3

Typical Application - 4 Channel Converter Using ISL6595 and PX3511A Gate Drivers +12V +5V +3.3V VDD V12_SEN GND ISL6595 OUT1 VID4 OUT2 VID3 ISEN1 VID2 OUT3 OUT4 VID1 ISEN2 FROM µP VID0 OUT5 VID5 OUT6 LL0 ISEN3 LL1 OUTEN OUT7 ...

Page 4

Absolute Maximum Ratings Supply Voltage (VCC .15V Supply ...

Page 5

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. (Continued) PARAMETER Three-State Upper Gate Falling Threshold Shutdown Holdoff Time UGATE Rise Time LGATE Rise Time UGATE Fall Time (Note 4) LGATE Fall Time (Note 4) UGATE Turn-On Propagation Delay (Note 4) ...

Page 6

... UGATE falls to less than 1.75V above the PHASE or the PHASE falls to less than +0.8V, the LGATE is released to turn on. Three-State PWM Input A unique feature of these drivers and other Intersil drivers the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window for a set holdoff time, the driver outputs are disabled and both MOSFET gates are pulled and held low ...

Page 7

PWM input through the body diode of the controller’s PWM output when the power-up and/or power-down sequence of bias supplies of the driver and PWM controller are required. Power-On Reset ...

Page 8

Equations 2 and 3, respectively, • VCC = + + Qg_TOT Qg_Q1 Qg_Q2 Q • UVCC G1 • • -------------------------------------- - Qg_Q1 SW V ...

Page 9

... The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide NX b improved electrical and thermal performance Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 0. 0.200 ...

Page 10

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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