IC DRIVER FULL BRIDGE DUAL 24DIP

L6227N

Manufacturer Part NumberL6227N
DescriptionIC DRIVER FULL BRIDGE DUAL 24DIP
ManufacturerSTMicroelectronics
TypeH Bridge
L6227N datasheet
 


Specifications of L6227N

Input TypeNon-InvertingNumber Of Outputs4
On-state Resistance730 mOhmCurrent - Output / Channel1.4A
Current - Peak Output2.8AVoltage - Supply8 V ~ 52 V
Operating Temperature-25°C ~ 125°CMounting TypeThrough Hole
Package / CasePowerSSO-24Operating Supply Voltage8 V to 52 V
Supply Current1.4 AMounting StyleThrough Hole
For Use With497-6817 - EVAL BOARD FOR L6227QLead Free Status / RoHS StatusLead free / RoHS Compliant
Other names497-3648  
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NON-DISSIPATIVE OVERCURRENT PROTECTION
The L6227 integrates an Overcurrent Detection Circuit (OCD). This circuit provides protection against a short
circuit to ground or between two phases of the bridge. With this internal over current detection, the external cur-
rent sense resistor normally used and its associated power dissipation are eliminated. Figure 12 shows a sim-
plified schematic of the overcurrent detection circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each high side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent I
. When the output current in one bridge reaches the detection threshold (typically 2.8A) the relative
REF
OCD comparator signals a fault condition. When a fault condition is detected, the EN pin is pulled below the turn
off threshold (1.3V typical) by an internal open drain MOS with a pull down capability of 4mA. By using an ex-
ternal R-C on the EN pin, the off time before recovering normal operation can be easily programmed by means
of the accurate thresholds of the logic inputs.
Figure 12. Overcurrent Protection Simplified Schematic
C or LOGIC
+5V
R
EN
EN
A
C
EN
Figure 13 shows the Overcurrent Detection operation. The Disable Time t
ation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected whether by
C
and R
values and its magnitude is reported in Figure 14. The Delay Time t
EN
EN
bridge when an overcurrent has been detected depends only by C
C
is also used for providing immunity to pin EN against fast transient noises. Therefore the value of C
EN
should be chosen as big as possible according to the maximum tolerable Delay Time and the R
be chosen according to the desired Disable Time.
The resistor R
should be chosen in the range from 2.2K to 180K . Recommended values for R
EN
are respectively 100K
and 5.6nF that allow obtaining 200 s Disable Time.
OUT1
A
POWER SENSE
1 cell
POWER DMOS
n cells
TO GATE
LOGIC
I
/ n
1A
OCD
COMPARATOR
(I
1A
I
INTERNAL
OPEN-DRAIN
R
DS(ON)
40 TYP.
OVER TEMPERATURE
EN
VS
OUT2
A
A
HIGH SIDE DMOSs OF
THE BRIDGE A
I
I
1A
2A
POWER SENSE
POWER DMOS
1 cell
n cells
+
I
/ n
2A
+I
) / n
2A
REF
D02IN1353
before recovering normal oper-
DISABLE
before turning off the
DELAY
value. Its magnitude is reported in Figure 15.
EN
L6227
EN
value should
and C
EN
EN
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