L6228QTR STMicroelectronics, L6228QTR Datasheet - Page 20

IC DVR BIPO STEP MOTOR 32-VFQFPN

L6228QTR

Manufacturer Part Number
L6228QTR
Description
IC DVR BIPO STEP MOTOR 32-VFQFPN
Manufacturer
STMicroelectronics
Type
Bipolar Stepper Motor Driverr
Datasheet

Specifications of L6228QTR

Applications
Stepper Motor Driver
Number Of Outputs
1
Current - Output
1.4A
Voltage - Supply
8 V ~ 52 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
Product
Stepper Motor Controllers / Drivers
Operating Supply Voltage
48 V
For Use With
497-6818 - EVAL BOARD FOR L6228Q
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6864-2
L6228QTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L6228QTR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
L6228QTR
Manufacturer:
ST
0
Part Number:
L6228QTR
Manufacturer:
ST
Quantity:
20 000
Circuit description
20/32
Figure 21. Overcurrent protection simplified schematic
Figure 22
recovering normal operation can be easily programmed by means of the accurate
thresholds of the logic inputs. It is affected whether by C
magnitude is reported in
an overcurrent has been detected depends only by C
Figure
C
the value of C
delay time and the R
The resistor R
values for R
disable time.
μC or LOGIC
EN
V
DD
is also used for providing immunity to pin EN against fast transient noises. Therefore
24.
R
C
shows the overcurrent detection operation. The disable time t
EN
EN
EN
.
.
EN
EN
and C
EN
should be chosen as big as possible according to the maximum tolerable
should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended
EN
EN
40Ω TYP.
R
DS(ON)
value should be chosen according to the desired disable time.
are respectively 100 kΩ and 5.6 nF that allow obtaining 200 μs
Figure
TO GATE
LOGIC
OPEN-DRAIN
Doc ID 14321 Rev 4
INTERNAL
23. The delay time t
POWER SENSE
COMPARATOR
COMPARATOR
1 cell
OCD
OCD
POWER DMOS
OVER TEMPERATURE
n cells
OUT1
DELAY
I
1A
FROM THE
BRIDGE B
EN
/ n
(I
1A
I
A
REF
I
EN
value. Its magnitude is reported in
1A
+I
before turning off the bridge when
VS
2A
+
and R
) / n
A
I
2A
OUT2
I
2A
EN
POWER DMOS
A
/ n
values and its
n cells
DISABLE
HIGH SIDE DMOSs OF
THE BRIDGE A
D01IN1337
POWER SENSE
before
L6228Q
1 cell

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