ISL6144IVZA Intersil, ISL6144IVZA Datasheet - Page 23

• Manufacturer Part Number: ISL6144IVZA
• Description: IC CTRLR MOSFET ORING HV 16TSSOP
• Manufacturer: Intersil

Specifications of ISL6144IVZA

• Applications: Telecom/Datacom Systems
• Fet Type: N-Channel
• Number Of Outputs: 1
• Internal Switch(s): No
• Delay Time - On: 1ms
• Delay Time - Off: 250ns
• Voltage - Supply: 10 V ~ 75 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

For a 12V to 24V Input:
NOTES:
Another important consideration when choosing the ORing
MOSFET is the forward voltage drop across the drain-
source. If this drop approaches the 0.41V limit, (which is
used in the V
result in a permanent fault indication. Normally, this voltage
drop is chosen to be less than 100mV.
Setting the External HS Comparator
Threshold Voltage
Typically, DC/DC modules used in redundant power systems
have some form of active current sharing to realize the full
benefit of this scheme including lower operating
temperatures, lower system failure rate, as well as better
transient response when load step is shared. Current
sharing is realized using different techniques; all of these
techniques will lead to similar modules operating under
similar conditions in terms of switching frequency, duty cycle,
output voltage and current. When paralleled modules are
current sharing, their individual output ripple will be similar in
amplitude and frequency and the common bus will have the
same ripple as these individual modules and will not cause
any of the turn-off mechanisms to be activated as the same
ripple will be present on both sensing nodes (V
V
threshold (V
V
will be system dependent and has to be finalized in the
system prototype stage. If the gate experiences false turn-off
due to system noise, the V
The reverse current peak can be estimated as:
V
V
14. V
15. V
16. V
17. All Above listed r
I
REVERSEP
OS(HS)
OUT
TH(HS)
SD
I
Load_Max
is the MOSFET forward voltage drop
DSS
DSS
DSS
). This would allow setting the high speed comparator
15A
40A
75A
is the voltage offset of HS Comparator
of 55mV could be used, the final value of this TH
= 30V; I
= 30V; I
= 30V; I
TABLE 2. INPUT VOLTAGE = 12V TO 24V
TH(HS)
=
OUT
V
---------------------------------------------------------------------- where
TH HS
IRF1503S (Note 14)
SUM110N03-03P (Note 15)
STB100NF03L-03 (Note 16)
IRF1503S
SUM110N03-03P
STB100NF03L-03
IRF1503S
SUM110N03-03P
STB100NF03L-03
D
D
D
MOSFET PART NUMBER
= 190A; r
= 110A; r
= 100A; r
fault monitoring mechanism), this will
(
DS(ON)
) to a very low value. As a starting point, a
)
r
+
DS ON
V
values are at V
(
DS(ON)
SD
DS(ON)
DS(ON)
TH(HS)
23
±
)
V
OS HS
= 2.6m
= 3.3m
= 3.2m
has to be increased.
(
)
;
Ω
GS
Ω
Ω
= 10V
IN
and
N
1
1
1
2
2
2
3
3
3
(EQ. 16)
ISL6144
The duration of the reverse current pulse is in the order of a
few hundred nanoseconds and is normally kept well below
the current rating of the ORing MOSFET.
Reducing the value of V
current amplitude and reduces transients on the common
bus voltage.
Just a reminder, this is not an operating scenario, but it is
rather a fault scenario and should not occur frequently. As
explained above, different power supplies have different
noise spectrum and might need adjustment of the V
The following procedure can be used for V
Choose a value of V
threshold voltage is positive to allow turn-off only when V
is lower than COMP. Take into account the worst-case of the
HS Comp offset (V
starting value is 55mV. The sum of R
exceed 50kΩ. It is suggested to choose R
calculate R
R
R
R
V
R
1. Operate all parallel feeds in current sharing mode (either
2. Vary the load current from 1A to its maximum value,
3. If at medium to maximum load currents all feeds have
4. If only one feed has its gate on, the threshold value is too
5. Verify the current sharing scheme and output voltages. If
REF(VSET)
1
1
2
1
= 499Ω
resistor connected between VOUT and COMP pins
resistor connected between COMP and VSET pins
by using current sharing techniques or by simply
adjusting the voltages very close to each other for natural
current sharing).
monitor the gate voltages, and make sure all gates are on
(note that at very light loads the current sharing scheme
might stop functioning and only one feed carries this light
current, at this point gate voltages will be just above the
gate threshold, and even maybe one gate will be on while
the others are not).
their gates on, then the chosen V
low and the gate is turning off due to power supply noise
and needs to be increased. Also, the feeds may not be
sharing the load current due to discrepancy in output
voltages and current sharing failure.
the output voltages and currents of each feed are equal
but one or more of the gates is still off, increase V
by increasing R
increases V
their FETs turned on.
=
---------------------------------------------------------------- - R
V
REF VSET
1
(
= 5.3V
according to Equation 17:
V
TH HS
TH(HS)
(
)
–
OS(HS)
1
V
TH(HS)
)
TH HS
in 250Ω to 500Ω increments (this
by 25mV to 50mV) until all feeds have
TH(HS)
(
= +25mV to -40mV). A good
)
such that the net HS comparator
2
results in lower reverse
1
TH(HS)
and R
2
TH(HS)
= 47.5kΩ and
2
is suitable.
is not to
January 6, 2011
selection:
TH(HS)
(EQ. 17)
TH(HS)
FN9131.6
IN
.