NCP1631DR2G ON Semiconductor, NCP1631DR2G Datasheet - Page 19

• Manufacturer Part Number: NCP1631DR2G
• Description: IC CTLR PFC INTERLEAVED 16SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1631DR2G

• Mode: Critical Conduction (CRM), Discontinuous Conduction (DCM)
• Frequency - Switching: 130kHz
• Current - Startup: 100µA
• Voltage - Supply: 10 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Brown−Out Protection
the ac line ripple so that a voltage proportional to the average value of (V
input voltage conditions. A 7−mA current source lowers the
BO pin voltage when a brown−out condition is detected.
This is for hysteresis purpose as required by this function.
higher than the 1 V internal voltage reference. In this case,
the output of the comparator BO_Comp (V
(see Figure 19).
output turns high and a 965 mV voltage source is connected
to the BO pin to maintain the pin level near 1 V. Then, a
50−ms blanking delay is activated during which no fault is
detected. The main goal of the 50−ms lag is to help meet
the hold−up requirements. In case of a short mains
interruption, no fault is detected and hence, the “pfcOK”
signal remains high and does not disable the downstream
converter. In addition, pin7 being kept at 965 mV, there is
almost no extra delay between the line recovery and the
occurrence of a proper voltage applied to pin2, that
otherwise would exist because of the large capacitor
typically placed between pin7 and ground to filter the input
voltage ripple. As a result, the NCP1631 effectively
“blanks” any mains interruption that is shorter than 25 ms
(minimum guaranteed value of the 50−ms timer).
activated that sets a 50−ms window during which a fault
The brown−out pin receives a portion of the input voltage (V
Ac line
The main function of the BO block is to detect too low
In nominal operation, the voltage applied to pin7 must be
Conversely, if V
At the end of this 50−ms blanking delay, another timer is
EM I
Filter
when the circuit is not fed
below the BO threshold
enough to control the
maintains the BO pin
state of the BO block
This PNP transistor
R
CS
C
pin7
in
C
bo
goes below 1 V, the BO_Comp
V
in
R
R
bo1
bo2
R
Rt
BO
Rt
I
Rt
V
7 mA
Vdd
BO
BOcomp
< 7 mA
Figure 19. Brown−out Block
1 V
s
2
980 mV
Clamp
) is low
IRt_ low
http://onsemi.com
I
Rt
s
1
I
19
Rt
IN
Current M irror
can be detected. This is the role of the second 50−ms timer
of Figure 19:
•
•
When the “BO_NOK” signal is high:
). As V
S
R
L
V
BO
BOcomp
if the output of OPAMP is high at the end of the first
delay (50−ms blanking time) and before the second
50−ms delay time is elapsed, a brownout condition is
detected
if the output of OPAMP remains low for the duration
of the second delay, no fault is detected.
− The drivers are disabled, the “V
− The OPAMP output is separated from pin7
Q
IN
is a rectified sinusoid, a capacitor must integrate
IN
grounded to recover operation with a soft−start
when the fault has gone and the “pfcOK”
voltage turns low to disable the downstream
converter.
(Figure 19) to prevent the operational
amplifier from maintaining 1 V on pin7 (as
done by the switches s
representation of Figure 19). Instead, V
drops to the value that is externally forced (by
V
consequence, the OPAMP output remains high
and the “BO_NOK” signal stays high until the
line recovers.
in
50-ms
delay
) is applied to the brown−out pin.
, R
reset
bo1
, R
bo2
50-ms
delay
res et
and C
V
BO
bo2
1
brown−out detection
and s
in Figure 19). As a
Feed−forward
Ci r c uitr y fo r
T
control
2
delay
circuitry
in the
high when V
(“V
This voltage
is below 1 V
BO_NOK
” pin is
BOcomp
pin2
”) is
pin7