NCP1631DR2G ON Semiconductor, NCP1631DR2G Datasheet - Page 20

• Manufacturer Part Number: NCP1631DR2G
• Description: IC CTLR PFC INTERLEAVED 16SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1631DR2G

• Mode: Critical Conduction (CRM), Discontinuous Conduction (DCM)
• Frequency - Switching: 130kHz
• Current - Startup: 100µA
• Voltage - Supply: 10 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

actions are properly done before the PFC driver is disabled
and the “V
voltage is not sufficient for operation), a pnp transistor
ensures that the BO pin voltage remains below the 1 V
threshold until V
that the circuit starts operation in the right state, that is,
“BONOK” high. When V
transistor turns off and the circuit enables the 7−mA current
source (I
but at startup, I
Brown−out Resistors Calculation
equations (for more details, refer to the application note
AND8407)
Feed−forward
internal current proportional to the input voltage average
value (I
on pin 3. Placing a resistor between pin 3 and ground,
enables to adjust a current proportional to the average input
voltage. This current (I
to form the charge current for the timing capacitor of each
phase. Since this current is proportional to the square of the
line magnitude, the conduction time is made inversely
proportional to the line magnitude. This feed−forward
feature makes the transfer function and the power delivery
independent of the ac line level. Only the regulation output
(V
too low ( below 7 mA), the controller goes in OFF mode to
avoid damaging the MOSFETs with too long conduction
time.
Thermal Shutdown (TSD)
drive and then keeps the power switch off when the junction
A short delay (T
At startup (and in UVLO situations that is when the Vcc
Also, (I
The BO resistors can be calculated with the following
As shown by Figure 19, The BO circuit also generates an
An internal thermal circuitry disables the circuit gate
R
R
REGUL
bo1
bo2
− The 7−mA current source is enabled that lowers
+
+
Rt
BO
) controls the power amount. If the I
). The pin7 voltage is buffered and made available
BO
(V
the pin7 voltage for hysteresis purpose.
control
).
(V
) is enabled whenever the part is in off−mode,
in,avg
V
in,avg
BO
BO(th)
” and “pfcOK” pins are grounded.
)
CC
boH
delay
is disabled until V
)
boL
reaches V
* (V
) is added to get sure that these three
Rt
R
1 *
) is internally copied and squared
bo1
I
HYST
in,avg
CC
3f
f
BO
line
CC(on)
exceeds V
)
boL
1 *
. This is to guarantee
CC
* 1
reaches V
3f
f
10
CC(on)
line
line
Rt
, the pnp
current is
CC(on)
(eq. 23)
(eq. 24)
http://onsemi.com
.
20
temperature exceeds 140°C typically. The output stage is
then enabled once the temperature drops below about 80°C
(60°C hysteresis).
circuit is not reset, that is, as long as V
V
be the upper one (140°C). This ensures that any cold
start−up will be done with the right TSD level.
Under−Voltage Lockout Section
block to prevent the circuit from operating when the power
supply is not high enough to ensure a proper operation. An
UVLO comparator monitors the pin 12 voltage (V
allow the NCP1631 operation when V
typically. The comparator incorporates some hysteresis
(2.0 V typically) to prevent erratic operation as the V
crosses the threshold. When V
comparator lower threshold, the circuit turns off.
the V
of a too high dissipation.
Output Drive Section
interleaved branches. Each output stage contains a totem
pole optimized to minimize the cross conduction current
during high frequency operation. The gate drive is kept in
a sinking mode whenever the Under−Voltage Lockout
(UVLO) is active or more generally whenever the circuit
is off. Its high current capability (−500 mA/+800 mA)
allows it to effectively drive high gate charge power
MOSFET.
Reference Section
voltage (V
over the temperature range (the typical value is 2.5 V).
V
the over−voltage protection. The circuit also incorporates
a precise current reference (I
Over−Current Limitation to feature a ±6% accuracy over
the temperature range.
Fault Management and OFF Mode
Practically, if the pin sources less than 7 mA, the “I
signal sets a latch that turns off the circuit if its output
(R
fault detections. The latch is reset when the circuit is in
UVLO state (too low V
CC
REF
The temperature shutdown keeps active as long as the
The NCP1631 incorporates an Under−Voltage Lockout
The circuit off state consumption is very low: < 50 mA.
This low consumption enables to use resistors to charge
The circuit embeds two drivers to control the two
The circuit features an accurate internal reference
The circuit detects a fault if the R
t(open)
RESET. The reset action forces the TSD threshold to
CC
is the voltage reference used for the regulation and
) is high. A 30−ms blanking time avoids parasitic
capacitor during the start−up without the penalty
REF
). V
REF
is optimized to be ±2.4% accurate
CC
levels for proper operation).
CC
REF
t
goes below the UVLO
pin is open (Figure 20).
CC
) that allows the
CC
keeps higher than
exceeds 12 V
Rt_Low
CC
) to
CC
”