ISL6548CRZA Intersil, ISL6548CRZA Datasheet

IC REG/CTRLR ACPI DUAL DDR 28QFN

ISL6548CRZA

Manufacturer Part Number
ISL6548CRZA
Description
IC REG/CTRLR ACPI DUAL DDR 28QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6548CRZA

Applications
Memory, DDR/DDR2 Regulator
Current - Supply
7mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6548 provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply V
state, a fully integrated sink-source regulator generates an
accurate (V
need for a negative supply. Two LDO controllers are also
integrated for the GMCH core voltage regulation and for the
GMCH/CPU V
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
±
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH/CPU V
within spec and operational.
Each output is monitored for undervoltage events. The
switching regulator also has overvoltage and overcurrent
protection. Thermal shutdown is integrated.
Pinout
2% over line, load, and temperature ranges. The output is
DDR_VTT
DDR_VTT
5VSBY
VDDQ
P12V
GND
S3#
DDQ
DDQ
1
2
3
4
5
6
7
during S0/S1 and S3 states. During S0/S1
TT
/2) high current V
28
8
termination voltage regulation.
27
9
ISL6548 (6x6 QFN)
10
26
TOP VIEW
®
GND
11
25
29
1
TT
TT
12
24
termination voltage is
Data Sheet
voltage without the
13
23
14
22
21
20
19
18
17
16
15
DRIVE4
REFADJ4
DRIVE3
FB3
FB4
COMP
FB
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Generates 4 Regulated Voltages
• ACPI Compliant Sleep State Control
• Glitch-free Transitions During State Changes
• PWM Controller Drives Low Cost N-Channel MOSFETs
• 250kHz Constant Frequency Operation
• Tight Output Voltage Regulation
• Fully-Adjustable Outputs with Wide Voltage Range: Down
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Overvoltage Monitoring on All Outputs
• OCP on the Switching Regulator
• Integrated Thermal Shutdown Protection
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Single and Dual Channel DDR Memory Power Systems in
• Graphics Cards - GPU and Memory Supplies
• ASIC Power Supplies
• Embedded Processor and I/O Supplies
• DSP Supplies
Ordering Information
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
ISL6548CRZA
(Note)
ISL6548CRZA-T
(Note)
PART NUMBER
- Synchronous Buck PWM Controller for DDR V
- 3A Integrated Sink/Source Linear Regulator with
- LDO Regulator for GMCH Core
- Sink/Source LDO Regulator for CPU/GMCH V
- All Outputs:
to 0.8V supports DDR and DDR2 Specifications
ACPI compliant PCs
Accurate VDDQ/2 Divider Reference for DDR V
Termination
January 3, 2006
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2006. All Rights Reserved
ISL6548CRZ
ISL6548CRZ
±
MARKING
2% Over Temperature
PART
RANGE
0 to 70
0 to 70
TEMP.
(°C)
28 Ld 6x6 QFN
(Pb-free)
28 Ld 6x6 QFN
Tape and Reel
(Pb-free)
PACKAGE
ISL6548
FN9188.2
TT
DDQ
TT
L28.6x6
L28.6x6
DWG. #
PKG.

Related parts for ISL6548CRZA

ISL6548CRZA Summary of contents

Page 1

... REFADJ4 19 DRIVE3 PART NUMBER 18 FB3 ISL6548CRZA (Note) 17 FB4 ISL6548CRZA-T 16 COMP (Note NOTE: Intersil Pb-free plus anneal products employ special Pb-free 14 material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...

Page 2

Block Diagram VDDQ P12V R GU EA4 DRIVE4 GMCH DUAL LDO R GL FB4 REFADJ4 P12V EA3 DRIVE3 FB3 P12V EA2 DRIVE2_U FB2 P12V DRIVE2_L 5VSBY S3# S5# FB P12V POR MONITOR AND CONTROL FAULT SOFTSTART & ENABLE A SOFTSTART ...

Page 3

Simplified Power System Diagram V DDQ SLP_S3 SLP_S5 GMCH + Q5 V TT_GMCH/CPU + Q6 Typical Application V DDQ_DDR SLP_S5 SLP_S3 GMCH TT_GMCH/CPU Q6 3 ISL6548 12V 5VSBY SLEEP STATE ...

Page 4

Absolute Maximum Ratings 5VSBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V ...

Page 5

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System Diagrams and Typical Application Schematics (Continued) PARAMETER PWM CONTROLLER GATE DRIVERS UGATE and LGATE Source UGATE and LGATE Sink VTT REGULATOR Upper Divider Impedance Lower ...

Page 6

Functional Pin Description 5VSBY (Pin 1) 5VSBY is the bias supply of the ISL6548 typically connected to the 5V standby rail of an ATX power supply. During S4/S5 sleep states the ISL6548 enters a reduced power mode and ...

Page 7

FB2 (Pin 11) Connect the output of the V TT_GMCH/CPU this pin through a properly sized resistor divider. The voltage at this pin is regulated to 0.8V. This pin is monitored for undervoltage events. DRIVE2 _U (Pin 10) This pin ...

Page 8

SLP_S3# SLP_S5# 12V POR 12V 0V V DDQ_DDR 0V V DDQ_DDR V TT_DDR 0V V GMCH_UPPER 0V V GMCH 0V V TT_GMCH/CPU 0V VIDPGD (3 SOFTSTART CYCLES Soft-Start Rise Time Dependent Upon ...

Page 9

The digital soft-start for the PWM regulator is accomplished by clamping the error amplifier reference input to a level proportional to the internal digital soft-start voltage. As the soft- start voltage slews up, the PWM comparator generates PHASE pulses of ...

Page 10

Fault Counter reaches a count any other time. The 16384 counts that are required to reset the Fault Reset Counter represent 8 soft-start cycles, as one soft-start cycle is 2048 clock ...

Page 11

Next are the small signal components which connect to sensitive nodes or supply critical bypass current and signal coupling. A multi-layer printed circuit ...

Page 12

DRIVER OSC PWM COMPARATOR - DRIVER ∆V + OSC E REFERENCE ERROR AMP DETAILED COMPENSATION COMPONENTS COMP ISL6548 REFERENCE   ...

Page 13

The output voltage programming resistor will depend on the value chosen for the feedback resistor and the desired output voltage of the particular regulator. × ---------------------------------- - – V 0.8V DDQ × ...

Page 14

Place the small ceramic capacitors physically close to the MOSFETs and between the drain of upper MOSFET and the source of lower MOSFET. The important parameters for the bulk input capacitance are the voltage rating and the RMS ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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